US6463059B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Direct memory access execution engine with indirect addressing of circular queues in addition to direct memory addressing
Assignee: Mosaid Technologies Inc
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Filing: 1998-12-04
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Granted: 2002-10-08
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Expires: 2018-12-04
Abstract
Abstract A method for enhancing transport packet demultiplexing and distribution in a digital transport demultiplexing system that inputs a stream of digital multimedia transport packets is provided. Each of the transport packets includes a packet identifier (PID) to identify the digital program or elementary stream to which it corresponds. Local packet information is generated for each of the transport packets, which is used in identifying and distributing the transport packets. A local header is created that includes the generated local packet information, and the local header is linked to its corresponding transport packet to create a modified transport packet. In this manner, each of the modified transport packets represents a self-contained digital transport packet having local distribution information contained therein. A transport stream demultiplexing apparatus for use in a digital transmission system capable of providing a plurality of digital transport packets to a digital program presentation device is provided. The demulitplexing apparatus performs the demultiplexing operation by creating a set of direct memory access (DMA) instructions for a DMA engine to execute when transferring the transport packets to one or more output queues. The DMA engine is also configured to descramble the contents of the transport packets while the DMA operation occurs.
Inventors
- 👤 Alek Movshovich
- 👤 Robert H. Hoem
- 👤 Niranjan A. Puttaswamy
- 👤 Brian Lai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 08:27
CPC Classifications
H; H04; H04L; H04L45/00; H04L45/16; H04L45/56; H04L45/566; H04L65/00; H04L65/60; H04L65/75; H04L65/764
Claims Analysis
Total Claims: 29
Claim 1
Independent Claim
109 words
A method for managing digital transport packet distribution in a transport packet demultiplexing system, wherein the transport packet demultiplexing system receives a transport stream including digital transport packets each identified by a packet identifier (PID), the method comprising: generating an address index for each of the transport packets based on the PID, wherein the address index corresponds to a memory queue address; generating a local header incorporating the address index for each of the transport packets; adding the local headers to their corresponding transport packets; and distributing the modified transport packet to corresponding memory queues based on their associated one of the memory queue addresses in the local header.
Claim 2
Independent Claim
109 words
A method for managing digital transport packet distribution in a transport packet demultiplexing system, wherein the transport packet demultiplexing system receives a transport stream including digital transport packets each identified by a packet identifier (PID), the method comprising: generating an address index for each of the transport packets based on the PID, wherein the address index corresponds to a memory queue address; generating a local header incorporating the address index for each of the transport packets; adding the local headers to their corresponding transport packets; and distributing the modified transport packet to corresponding memory queues based on their associated one of the memory queue addresses in the local header.
Claim 3
Independent Claim
157 words
A method for managing digital transport packet distribution in a transport packet demultiplexing system, wherein the transport packet demultiplexing system receives a transport stream including digital transport packets each identified by a packet identifier (PID), the method comprising: generating an address index for each of the transport packets based on the PID, wherein the address index corresponds to a memory queue address; generating a local header incorporating the address index for each of the transport packets; adding the local headers to their corresponding transport packets; and distributing the modified transport packet to corresponding memory queues based on their associated one of the memory queue addresses in the local header, including reading the local headers of the transport packets, generating direct memory access (DMA) instructions indicating where the transport packet is to be distributed, storing the DMA instructions in memory, and transferring the transport packets using a DMA transport engine which executes the DMA instructions directly from memory.
Claim 4
Independent Claim
157 words
A method for managing digital transport packet distribution in a transport packet demultiplexing system, wherein the transport packet demultiplexing system receives a transport stream including digital transport packets each identified by a packet identifier (PID), the method comprising: generating an address index for each of the transport packets based on the PID, wherein the address index corresponds to a memory queue address; generating a local header incorporating the address index for each of the transport packets; adding the local headers to their corresponding transport packets; and distributing the modified transport packet to corresponding memory queues based on their associated one of the memory queue addresses in the local header, including reading the local headers of the transport packets, generating direct memory access (DMA) instructions indicating where the transport packet is to be distributed, storing the DMA instructions in memory, and transferring the transport packets using a DMA transport engine which executes the DMA instructions directly from memory.
Claim 5
Dependent Claim
20 words
The method according to claim 2 , wherein the DMA transport engine transfers the transport packets as a memory-to-memory operation.
Claim 6
Dependent Claim
18 words
The method according to claim 3 , wherein the memory-to-memory operation is specified using an absolute source address.
Claim 7
Dependent Claim
18 words
The method according to claim 3 , wherein the memory-to-memory operation is specified using an absolute destination address.
Claim 8
Dependent Claim
22 words
The method according to claim 3 , wherein the memory-to-memory operation is specified using a queue number to specify a source address.
Claim 9
Dependent Claim
22 words
The method according to claim 3 , wherein the memory-to-memory operation is specified using a queue number to specify a destination address.
Claim 10
Dependent Claim
20 words
The method according to claim 3 , wherein the memory-to-memory operation comprises a de-scrambling operation as the data transfer occurs.
Claim 11
Dependent Claim
18 words
The method according to claim 8 , wherein the memory-to-memory operation is specified using an absolute source address.
Claim 12
Dependent Claim
18 words
The method according to claim 8 , wherein the memory-to-memory operation is specified using an absolute destination address.
Claim 13
Dependent Claim
22 words
The method according to claim 8 , wherein the memory-to-memory operation is specified using a queue number to specify a source address.
Claim 14
Dependent Claim
22 words
The method according to claim 8 , wherein the memory-to-memory operation is specified using a queue number to specify a destination address.
Claim 15
Dependent Claim
19 words
The method according to claim 8 , wherein the de-scrambling operation uses a key stored within a key table.
Claim 16
Dependent Claim
21 words
The method according to claim 13 , wherein the key used in a de-scrambling operation is selected by a key pointer.
Claim 17
Dependent Claim
44 words
The method according to claim 3 , wherein the memory-to memory operation comprises: a memory read operation from a source address; a first memory write to a first destination address; and a second memory write to a Sky Queue using a second destination address.
Claim 18
Dependent Claim
36 words
The method according to claim 15 , wherein the memory-to-memory operation further comprises a de-scrambling as the data transfer occurs using a key stored in a key table, the key is selected using a key pointer.
Claim 19
Dependent Claim
16 words
The method according to claim 16 , wherein the source address is an absolute memory address.
Claim 20
Dependent Claim
15 words
The method according to claim 16 , wherein the source address is a queue number.
Claim 21
Dependent Claim
17 words
The method according to claim 16 , wherein the first destination address is an absolute memory address.
Claim 22
Dependent Claim
16 words
The method according to claim 16 , wherein the first destination address is a queue number.
Claim 23
Dependent Claim
17 words
The method according to claim 16 , wherein the second destination address is an absolute memory address.
Claim 24
Dependent Claim
16 words
The method according to claim 16 , wherein the second destination address is a queue number.
Claim 25
Dependent Claim
25 words
The method according to claim 3 , wherein the completion of the memory-to-memory operation comprises a interrupt service request be sent to a host processor.
Claim 26
Independent Claim
202 words
A method for managing digital transport packet distribution in a transport packet demultiplexing system, wherein the transport packet demultiplexing system receives a transport stream including digital transport packets each identified by a packet identifier (PID), the method comprising: generating an address index for each of the transport packets based on the PID, wherein the address index corresponds to a memory queue address; generating a local header incorporating the address index for each of the transport packets; adding the local headers to their corresponding transport packets; and distributing the modified transport packet to corresponding memory queues based on their associated one of the memory queue addresses in the local header; wherein the distributing step comprises: reading the local headers of the transport packets; generating direct memory access (DMA) instructions indicating where the transport packet is to be distributed; storing the DMA instructions in memory; and transferring the transport packets using a DMA transport engine which executes the DMA instructions directly from memory; and the DMA transport engine transfers the transport packets as a memory-to-memory operation, the memory-to-memory operation selectively comprises a de-scrambling as the data transfer occurs using a key stored in a key table, the key is selected using a key pointer.
Claim 27
Independent Claim
202 words
A method for managing digital transport packet distribution in a transport packet demultiplexing system, wherein the transport packet demultiplexing system receives a transport stream including digital transport packets each identified by a packet identifier (PID), the method comprising: generating an address index for each of the transport packets based on the PID, wherein the address index corresponds to a memory queue address; generating a local header incorporating the address index for each of the transport packets; adding the local headers to their corresponding transport packets; and distributing the modified transport packet to corresponding memory queues based on their associated one of the memory queue addresses in the local header; wherein the distributing step comprises: reading the local headers of the transport packets; generating direct memory access (DMA) instructions indicating where the transport packet is to be distributed; storing the DMA instructions in memory; and transferring the transport packets using a DMA transport engine which executes the DMA instructions directly from memory; and the DMA transport engine transfers the transport packets as a memory-to-memory operation, the memory-to-memory operation selectively comprises a de-scrambling as the data transfer occurs using a key stored in a key table, the key is selected using a key pointer.
Claim 28
Independent Claim
207 words
An apparatus for managing digital transport packet distribution in a transport packet demultiplexing system, wherein the transport packet demultiplexing system receives a transport stream including digital transport packets each identified by a packet identifier (PID), the apparatus comprising: means for generating an address index for each of the transport packets based on the PID, wherein the address index corresponds to a memory queue address; means for generating a local header incorporating the address index for each of the transport packets; means for adding the local headers to their corresponding transport packets; and means for distributing the modified transport packet to corresponding memory queues based on their associated one of the memory queue addresses in the local header; wherein the distributing means comprises: means for reading the local headers of the transport packets; means for generating direct memory access (DMA) instructions indicating where the transport packet is to be distributed; means for storing the DMA instructions in memory; and means for transferring the transport packets using a DMA transport engine which executes the DMA instructions directly from memory; and the DMA transport engine transfers the transport packets as a memory-to-memory operation and the memory-to-memory operation selectively comprises a de-scrambling means using a key stored in a key table.
Claim 29
Independent Claim
207 words
An apparatus for managing digital transport packet distribution in a transport packet demultiplexing system, wherein the transport packet demultiplexing system receives a transport stream including digital transport packets each identified by a packet identifier (PID), the apparatus comprising: means for generating an address index for each of the transport packets based on the PID, wherein the address index corresponds to a memory queue address; means for generating a local header incorporating the address index for each of the transport packets; means for adding the local headers to their corresponding transport packets; and means for distributing the modified transport packet to corresponding memory queues based on their associated one of the memory queue addresses in the local header; wherein the distributing means comprises: means for reading the local headers of the transport packets; means for generating direct memory access (DMA) instructions indicating where the transport packet is to be distributed; means for storing the DMA instructions in memory; and means for transferring the transport packets using a DMA transport engine which executes the DMA instructions directly from memory; and the DMA transport engine transfers the transport packets as a memory-to-memory operation and the memory-to-memory operation selectively comprises a de-scrambling means using a key stored in a key table.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-10-07 | 2006-04-08 | 2006-10-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-10-07 | 2010-04-08 | 2010-10-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-10-07 | 2014-04-08 | 2014-10-08 | $7700.00 | Window Closed / Lapsed |