Semiconductor device

Claim 2

A semiconductor device comprising two or more semiconductor chips including first and second semiconductor chips stacked on a substrate, wherein a connection pad of said first semiconductor chip faces said substrate, and said first and second semiconductor chips are both connected to input/output terminals of said substrate by means of wires.

Claim 3

The semiconductor device according to claim 1 , wherein a lowermost semiconductor chip which is the nearest to said substrate is said first semiconductor chip, and said lowermost semiconductor chip is connected to an input/output terminal on a rear surface side of said substrate by means of a wire that passes through a through-hole formed in said substrate.

Claim 4

The semiconductor device according to claim 1 , wherein said second semiconductor chip is stacked adjacent to said first semiconductor chip, and has a connection pad that is positioned to face away from said substrate.

Claim 5

The semiconductor device according to claim 1 , wherein at least two semiconductor chips out of said two or more semiconductor chips have a same size.

Claim 6

A semiconductor device comprising a semiconductor chip in a laminated state in which two or more semiconductor chips are stacked on a substrate, wherein first and second semiconductor chips are stacked adjacent to each other in an up-and-down direction, and connection pads of said first and second semiconductor chips both face the substrate, and said first and second semiconductor chips are both connected to substantially coplanar input/output terminals on a front surface side of said substrate by means of inner bumps.

Claim 7

A semiconductor device comprising a semiconductor chip in a laminated state in which two or more semiconductor chips are stacked on a substrate, wherein first and second semiconductor chips are stacked adjacent to each other in an up-and-down direction, and connection pads of said first and second semiconductor chips both face the substrate, and said first and second semiconductor chips are both connected to substantially coplanar input/output terminals on a front surface side of said substrate by means of inner bumps.

Claim 8

The semiconductor device according to claim 5 , wherein said first semiconductor chip is a lowermost semiconductor chip which is the nearest to said substrate, and said second semiconductor chip is positioned thereon.

Claim 9

A semiconductor device comprising a semiconductor chip in a laminated state in which two or more semiconductor chips are stacked on a substrate, wherein first and second semiconductor chips are stacked adjacent to each other in an up-and-down direction, and connection pads of said first and second semiconductor chips both face the substrate, and said first and second semiconductor chips are both connected to an input/output terminal on a rear surface side of said substrate by means of a wire that passes through a through-hole formed in said substrate.

Claim 10

A semiconductor device comprising a semiconductor chip in a laminated state in which two or more semiconductor chips are stacked on a substrate, wherein first and second semiconductor chips are stacked adjacent to each other in an up-and-down direction, and connection pads of said first and second semiconductor chips both face the substrate, and said first and second semiconductor chips are both connected to an input/output terminal on a rear surface side of said substrate by means of a wire that passes through a through-hole formed in said substrate.

Claim 11

A semiconductor device comprising a semiconductor chip in a laminated state in which two or more semiconductor chips are stacked on a substrate, wherein first and second semiconductor chips are stacked adjacent to each other in a up-and-down direction, and connection pads of said first and second semiconductor chips both face the substrate, and either one of said first and second semiconductor chips is connected to an input/output terminal on a front surface side of said substrate by means of an inner bump, and the other is connected to an input/output terminal on a rear surface side of said substrate by means of a wire that passes through a through-hole formed in said substrate.

Claim 12

A semiconductor device comprising a semiconductor chip in a laminated state in which two or more semiconductor chips are stacked on a substrate, wherein first and second semiconductor chips are stacked adjacent to each other in a up-and-down direction, and connection pads of said first and second semiconductor chips both face the substrate, and either one of said first and second semiconductor chips is connected to an input/output terminal on a front surface side of said substrate by means of an inner bump, and the other is connected to an input/output terminal on a rear surface side of said substrate by means of a wire that passes through a through-hole formed in said substrate.

Claim 13

A semiconductor device comprising a semiconductor chip in a laminated state in which two or more semiconductor chips are stacked on a substrate, wherein first and state semiconductor chips are stacked adjacent to each other in an up-and-down direction, and connection pads of said first and second semiconductor chips both face the substrate, and at least two semiconductor chips out of said two or more semiconductor chips have a same size.

Claim 14

A semiconductor device comprising a semiconductor chip in a laminated state in which two or more semiconductor chips are stacked on a substrate, wherein first and state semiconductor chips are stacked adjacent to each other in an up-and-down direction, and connection pads of said first and second semiconductor chips both face the substrate, and at least two semiconductor chips out of said two or more semiconductor chips have a same size.