US6442172B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Input buffering and queue status-based output control for a digital traffic switch
Assignee: Alcatel Lucent SAS
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Filing: 1998-03-31
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Granted: 2002-08-27
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Expires: 2018-03-31
Abstract
Abstract A digital traffic switch having DIBOC buffer control has a queue status-based control strategy to limit status traffic on the switch and status buffer requirements. Status messages are transmitted from inputs to outputs when the content status of a logical output queue has changed from “empty” to “not empty”, or vice versa, rather than on a “per cell” request basis. Status messages are transmitted from outputs to inputs when the clearance status of a logical output queue has changed from “not clear to release” to “clear to release”, or vice versa, rather than on a “per cell” grant basis. The status of each logical output queue is monitored at outputs by retaining and updating a single status bit which has a particular binary value when the logical output queue's status is “empty” and the opposite binary value when the logical output queue's status is “not empty”. The status of each logical output queue is monitored at inputs by retaining and updating a single status bit which has a particular binary value when the logical output queue's status is “not clear to release” and the opposite binary value when the logical output queue's status is “clear to release”. Outputs generate (but do not transmit) release grants in a logical order determined by running a grant generation algorithm. Inputs release discrete information units in a logical order determined by running a release algorithm. Status messages for logical output queues are re-transmitted when extra bandwidth is available to remove any inaccurate view of the status of the logical output queues resulting from transmission failures of the original status messages.
Inventors
- 👤 John D. Wallner
- 👤 Chris L. Hoogenboom
- 👤 Michael J. Nishimura
- 👤 Michael K. Wilson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 00:29
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04L12/5602; H04L49/00; H04L49/30; H04L49/3081; H04Q; H04Q11/00; H04Q11/04; H04Q11/0428; H04Q11/0478; H04L2012/5638; H04L2012/5646; H04L2012/5647; H04L2012/5678; H04L2012/5681
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
203 words
A method of controlling buffering of a discrete information unit of digital data, for use within a digital switch having multiple source input ports, multiple destination output ports, and a switch fabric for switching a discrete information unit received at any of the source input ports to any of the destination output ports, wherein each source input port is associated with an input unit including an input buffer having a plurality of logical output queues and wherein each destination output port is associated with an output unit, the method comprising: (a) on an input unit, changing by one the number of discrete information units buffered in a logical output queue within an input buffer, the logical output queue reserved for buffering discrete information units received on the input unit and destined for a particular output unit; and (b) transmitting a queue status message from the input unit to the particular output unit only in cases where, (i) the change was an incrementing of the number of discrete information units buffered in the logical output queue from zero to one, and (ii) the change was a decrementing of the number of discrete information units buffered in the logical output queue from one to zero.
Claim 2
Independent Claim
203 words
A method of controlling buffering of a discrete information unit of digital data, for use within a digital switch having multiple source input ports, multiple destination output ports, and a switch fabric for switching a discrete information unit received at any of the source input ports to any of the destination output ports, wherein each source input port is associated with an input unit including an input buffer having a plurality of logical output queues and wherein each destination output port is associated with an output unit, the method comprising: (a) on an input unit, changing by one the number of discrete information units buffered in a logical output queue within an input buffer, the logical output queue reserved for buffering discrete information units received on the input unit and destined for a particular output unit; and (b) transmitting a queue status message from the input unit to the particular output unit only in cases where, (i) the change was an incrementing of the number of discrete information units buffered in the logical output queue from zero to one, and (ii) the change was a decrementing of the number of discrete information units buffered in the logical output queue from one to zero.
Claim 3
Dependent Claim
43 words
The method according to claim 1 , further comprising: (c) on the particular output unit, writing in a bit location reserved for the logical output queue a bit identifying the status of the logical output queue as indicated by the queue status message.
Claim 4
Dependent Claim
65 words
The method according to claim 1 , further comprising: (c) on the particular output unit, in response to any queue status message transmitted in step (b) as a result of an incrementing of the number of discrete information units buffered in the logical output queue from zero to one, eventually incrementing the number of outstanding discrete information unit release grants for the logical output queue.
Claim 5
Dependent Claim
20 words
The method according to claim 1 , further comprising: (c) eventually re-transmitting any queue status message transmitted in step (b).
Claim 6
Dependent Claim
25 words
The method according to claim 1 , wherein the logical output queue is further limited to buffering discrete information units having a particular priority level.
Claim 7
Dependent Claim
26 words
The method according to claim 1 , wherein the logical output queue is further limited to buffering discrete information units destined for a particular output port.
Claim 8
Dependent Claim
27 words
The method according to claim 1 , wherein the number of discrete information units is incremented by buffering a discrete information unit in the logical output queue.
Claim 9
Dependent Claim
27 words
The method according to claim 1 , wherein the number of discrete information units is decremented by releasing a discrete information unit from the logical output queue.
Claim 10
Independent Claim
209 words
A method of controlling buffering of a discrete information unit of digital data, for use within a digital switch having multiple source input ports, multiple destination output ports, and a switch fabric for switching a discrete information unit received at any of the source input ports to any of the destination output ports, wherein each source input port is associated with an input unit including an input buffer having a plurality of logical output queues and wherein each destination output port is associated with an output unit, the method comprising: (a) on an output unit, changing by one the number of outstanding discrete information unit release grants for a logical output queue residing within an input buffer on a particular input unit, the logical output queue reserved for buffering discrete information units received on the particular input unit and destined for the output unit; and (b) transmitting a queue status message from the output unit to the particular input unit only in cases where, (i) the change was an incrementing of the number of outstanding release grants for the logical output queue from zero to one, and (ii) the change was a decrementing of the number of outstanding release grants for the logical output queue from one to zero.
Claim 11
Independent Claim
209 words
A method of controlling buffering of a discrete information unit of digital data, for use within a digital switch having multiple source input ports, multiple destination output ports, and a switch fabric for switching a discrete information unit received at any of the source input ports to any of the destination output ports, wherein each source input port is associated with an input unit including an input buffer having a plurality of logical output queues and wherein each destination output port is associated with an output unit, the method comprising: (a) on an output unit, changing by one the number of outstanding discrete information unit release grants for a logical output queue residing within an input buffer on a particular input unit, the logical output queue reserved for buffering discrete information units received on the particular input unit and destined for the output unit; and (b) transmitting a queue status message from the output unit to the particular input unit only in cases where, (i) the change was an incrementing of the number of outstanding release grants for the logical output queue from zero to one, and (ii) the change was a decrementing of the number of outstanding release grants for the logical output queue from one to zero.
Claim 12
Dependent Claim
43 words
The method according to claim 9 , further comprising: (c) on the particular input unit, writing in a bit location reserved for the logical output queue a bit identifying the status of the logical output queue as indicated by the queue status message.
Claim 13
Dependent Claim
63 words
The method according to claim 9 , further comprising: (c) on the particular input unit, in response to any queue status message transmitted in step (b) as a result of an incrementing of the number of outstanding release grants for the logical output queue from zero to one, eventually releasing a discrete information unit from the logical output queue to the output unit.
Claim 14
Dependent Claim
20 words
The method according to claim 9 , further comprising: (c) eventually re-transmitting any queue status message transmitted in step (b).
Claim 15
Dependent Claim
25 words
The method according to claim 9 , wherein the logical output queue is further limited to buffering discrete information units having a particular priority level.
Claim 16
Dependent Claim
26 words
The method according to claim 9 , wherein the logical output queue is further limited to buffering discrete information units destined for a particular output port.
Claim 17
Dependent Claim
33 words
The method according to claim 9 , wherein the number of outstanding grants is incremented by issuing a grant to the logical output queue in an order determined by a grant generation algorithm.
Claim 18
Dependent Claim
26 words
The method according to claim 9 , wherein the number of outstanding grants is decremented by receiving a discrete information unit from the logical output queue.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-08-26 | 2006-02-25 | 2006-08-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-08-26 | 2010-02-25 | 2010-08-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-08-26 | 2014-02-25 | 2014-08-27 | $7700.00 | Window Closed / Lapsed |