Generator of neuron transfer function and its derivative

Claim 2

A neuron circuit, capable of generating an adjustable sigmoid-like function and a good approximation of its derivative, comprising: a current generator for generating a current by the different input voltages; a current-controlled transistor for changing an output voltage according to the current from the current generator; and at least one differential pair of transistors for generating the adjustable sigmoid-like function output and the good approximation of its derivative by the output voltage changed by the current-controlled transistor.

Claim 3

The neuron circuit of claim 1 , wherein the current generator is a complementary pair of transistors with different input voltages from the gate electrodes.

Claim 4

The neuron circuit of claim 1 , wherein the current-controlled transistor is a surface field-effect transistor.

Claim 5

The neuron circuit of claim 1 , wherein the differential pair of transistors are respectively connected to a load to form an identified side to each other.

Claim 6

The neuron circuit of claim 4 , wherein the load is any active device.

Claim 7

A neuron circuit, comprising: a pair of transistors having a first common terminal connected to a first input voltage, a second common terminal connected to a first output, a first gate connected to a second input voltage, and a second gate connected to a third input voltage; a surface field-effect transistor having a first terminal and a third gate connected together to the first output, which is connected to a first current source, and a second terminal connected to a second current source; a first differential pair of transistors, having a third common terminal connected to a third current source, a first gate connected to the first output, a second gate connected to a fourth input voltage, a first terminal connected to a first load to form a connecting point as a second output, and a second terminal connected to a second load; and a second differential pair of transistors, having a fourth common terminal connected to the third current source, a third gate connected to the first gate of the first differential pair of transistors output, a fourth gate connected to a fifth input voltage, a third terminal connected to a third load to form a connecting point as a third output, and a fourth terminal connected to fourth load.

Claim 8

A neuron circuit, comprising: a pair of transistors having a first common terminal connected to a first input voltage, a second common terminal connected to a first output, a first gate connected to a second input voltage, and a second gate connected to a third input voltage; a surface field-effect transistor having a first terminal and a third gate connected together to the first output, which is connected to a first current source, and a second terminal connected to a second current source; a first differential pair of transistors, having a third common terminal connected to a third current source, a first gate connected to the first output, a second gate connected to a fourth input voltage, a first terminal connected to a first load to form a connecting point as a second output, and a second terminal connected to a second load; and a second differential pair of transistors, having a fourth common terminal connected to the third current source, a third gate connected to the first gate of the first differential pair of transistors output, a fourth gate connected to a fifth input voltage, a third terminal connected to a third load to form a connecting point as a third output, and a fourth terminal connected to fourth load.

Claim 9

The neuron circuit of claim 6 , wherein the first differential pair of transistors and the second differential pair of transistors are identified in configuration.

Claim 10

The neuron circuit of claim 6 , wherein both of the fourth input voltage and the fifth input voltage are constant values and have a fixed voltage difference.

Claim 11

The neuron circuit of claim 6 , wherein the second output outputs a sigmoidal transfer function while the third output outputs an approximate derivative of the sigmoidal transfer function.

Claim 12

The neuron circuit of claim 6 , wherein the second output outputs an approximate derivative of a sigmoidal transfer function while the third output outputs the sigmoidal transfer function.

Claim 13

The neuron circuit of claim 6 , wherein all loads are identified and each comprises: a first transistor, having a first terminal connected to an power voltage, a second terminal, and a gate connected to the second terminal; and a second transistor, having a first terminal connected to the second terminal of the first transistor, a second terminal connected to the respective transistor of the corresponding differential pair of transistors, and a gate connected to the second terminal.

Claim 14

A neuron circuit for generating an adjustable sigmoid-like function and approximation of its derivative, comprising: a current generator, the current generator receiving different input voltages and generating a current; a current-controlled transistor, the current-controlled transistor receiving the current and adjusting an output voltage; and at least one differential pair of identical transistors, the at least one differential pair of identical transistors receiving the adjusted output voltage and generating the adjustable sigmoid-like function and approximation of its derivative.

Claim 15

A neuron circuit for generating an adjustable sigmoid-like function and approximation of its derivative, comprising: a current generator, the current generator receiving different input voltages and generating a current; a current-controlled transistor, the current-controlled transistor receiving the current and adjusting an output voltage; and at least one differential pair of identical transistors, the at least one differential pair of identical transistors receiving the adjusted output voltage and generating the adjustable sigmoid-like function and approximation of its derivative.

Claim 16

The apparatus of claim 12 , wherein the current generator is comprised of two transistors, the two transistors operating in their linear region.

Claim 17

The apparatus of claim 13 , wherein the two transistors have a first common terminal and a second common terminal.

Claim 18

The apparatus of claim 14 , wherein a linear resistor is formed between the first common terminal and the second common terminal.

Claim 19

The apparatus of claim 15 , wherein the linear resistor is controlled by the different input voltages.