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Patent US6403976B1 successfully refreshed from Google Patents.
US6403976B1
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Semiconductor crystal, fabrication method thereof, and semiconductor device
Assignee: Panasonic Holdings Corp
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Filing: 2000-01-13
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Granted: 2002-06-11
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Expires: 2020-01-13
Abstract
Abstract A Si 1−x Ge x /Si 1−y C y short-period superlattice which functions as a single SiGeC layer is formed by alternately growing Si 1−x Ge x layers (0<x<1) and Si 1−y C y layers (0<y<1) each having a thickness corresponding to several atomic layers which is small enough to prevent discrete quantization levels from being generated. This provides a SiGeC mixed crystal which is free from Ge—C bonds and has good crystalline quality and thermal stability. The Si 1−x Ge x /Si 1−y C y short-period superlattice is fabricated by a method in which Si 1−x Ge x layers and Si 1−y C y layers are epitaxially grown alternately, or a method in which a Si/Si 1−x Ge x short-period superlattice is first formed and then C ions are implanted into the superlattice followed by annealing for allowing implanted C ions to migrate to Si layers.
Inventors
- 👤 Tohru Saitoh
- 👤 Yoshihiko Kanzawa
- 👤 Koji Katayama
- 👤 Katsuya Nozawa
- 👤 Gaku Sugahara
- 👤 Minoru Kubo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 16:03
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/80; H10D62/82; H10D62/822; H10P; H10P14/00; H10P14/20; C; C30; C30B; C30B23/00; C30B23/02; C30B29/00; C30B29/60; C30B29/68; H10D30/00; H10D30/60; H10D30/751; H10D62/81; H10D62/815; H10D62/8161; H10D62/8162; H10D62/8164; H10P14/24; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/32; H10P14/3202; H10P14/3204; H10P14/3208; H10P14/3211; H10P14/3242; H10P14/3244; H10P14/3251; H10P14/3252; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3408; H10P14/3411
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
81 words
A semiconductor crystal comprising a superlattice structure including two or more periods of alternately stacked C included first layers containing Si and Ge as major components and second layers containing Si and C as major components, wherein the concentration of C in the first layers is lower than the concentration of C in the second layers, wherein the concentration of C in an interface of the superlattice structure changes continuously, and wherein the superlattice structure functions as a single SiGeC layer.
Claim 2
Dependent Claim
81 words
A semiconductor crystal comprising a superlattice structure including two or more periods of alternately stacked C included first layers containing Si and Ge as major components and second layers containing Si and C as major components, wherein the concentration of C in the first layers is lower than the concentration of C in the second layers, wherein the concentration of C in an interface of the superlattice structure changes continuously, and wherein the superlattice structure functions as a single SiGeC layer.
Claim 3
Dependent Claim
49 words
The semiconductor crystal of claim 1 , wherein the thickness of each of the C included first layers containing Si and Ge as major components and the second layers containing Si and C as major components is smaller than a thickness which allows discrete quantization levels to be generated.
Claim 4
Dependent Claim
111 words
A semiconductor device comprising: a substrate; a first semiconductor layer containing at least Si, formed on the substrate; and a second semiconductor layer formed in contact with the first semiconductor layer for functioning as a SiGeC layer, wherein the second semiconductor layer has a structure including at least two or more periods of alternately stacked C included first layers containing Si and Ge as major components and second layers containing Si and C as major components, wherein the concentration of C in the first layers is lower than the concentration of C in the second layers, and wherein the concentration of C in an interface of the superlattice structure changes continuously.
Claim 5
Dependent Claim
111 words
A semiconductor device comprising: a substrate; a first semiconductor layer containing at least Si, formed on the substrate; and a second semiconductor layer formed in contact with the first semiconductor layer for functioning as a SiGeC layer, wherein the second semiconductor layer has a structure including at least two or more periods of alternately stacked C included first layers containing Si and Ge as major components and second layers containing Si and C as major components, wherein the concentration of C in the first layers is lower than the concentration of C in the second layers, and wherein the concentration of C in an interface of the superlattice structure changes continuously.
Claim 6
Dependent Claim
49 words
The semiconductor device of claim 3 , wherein the thickness of each of the C included first layers containing Si and Ge as major components and the second layers containing Si and C as major components is smaller than a thickness which allows discrete quantization levels to be generated.
References Cited (Backward Citations)
JPH10116919A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-06-10 | 2005-12-10 | 2006-06-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-06-10 | 2009-12-10 | 2010-06-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-06-10 | 2013-12-10 | 2014-06-11 | $7700.00 | Window Closed / Lapsed |