Patent US6401156B1 successfully refreshed from Google Patents.
US6401156B1
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Flexible PC/AT-compatible microcontroller
Assignee: GlobalFoundries Inc
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Filing: 1999-08-23
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Granted: 2002-06-04
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Expires: 2019-08-23
Abstract
Abstract A microcontroller for PC/AT-compatible or non-PC/AT compatible embedded environments is disclosed. The microcontroller includes a general purpose bus which may emulate an ISA bus in a PC/AT-compatible mode. PC/AT-compatible DMA channels, interrupt controllers, programmable timers, a real-time clock, processor, and a flexible memory and an I/O mapping scheme are provided by the microcontroller. The programmable timers, interrupt controllers, DMA channels and I/O mapping can be configured for a PC/AT-compatible mode or a non-PC/AT-compatible mode. In particular, the plurality of interrupt controllers are configured such that some are enabled during PC/AT-compatible operation while the remainder are disabled. The microcontroller further embeds several PC/AT peripheral devices and yet maintains the flexibility to support external devices if desired by the embedded system designer. Other PC/AT-compatible features are also supported by the microcontroller.
Inventors
- 👤 James O. Mergard
- 👤 James R. Magro
- 👤 Michael S. Quimby
- 👤 Pratik M. Mehta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 14:08
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/24
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
132 words
A flexible PC/AT-compatible microcontroller, comprising: an 8088-compatible processor; a processor bus coupled to the 8088-compatible processor; a general purpose bus controller coupled to the processor bus; a general purpose bus coupled to the general purpose bus controller, the general purpose bus emulating an industry standard architecture-compatible bus in a PC/AT-compatible mode; a plurality of PC/AT peripheral devices coupled to the general purpose bus; and a plurality of programmable interrupt controllers coupled to the general purpose bus to provide a plurality of interrupt request lines for the plurality of PC/AT peripheral devices, a first set of programmable interrupt controllers of the plurality of programmable interrupt controllers being disabled in a PC/AT-compatible mode and a second set of programmable interrupt controllers of the plurality of programmable interrupt controllers being enabled in a PC/AT-compatible mode.
Claim 2
Dependent Claim
132 words
A flexible PC/AT-compatible microcontroller, comprising: an 8088-compatible processor; a processor bus coupled to the 8088-compatible processor; a general purpose bus controller coupled to the processor bus; a general purpose bus coupled to the general purpose bus controller, the general purpose bus emulating an industry standard architecture-compatible bus in a PC/AT-compatible mode; a plurality of PC/AT peripheral devices coupled to the general purpose bus; and a plurality of programmable interrupt controllers coupled to the general purpose bus to provide a plurality of interrupt request lines for the plurality of PC/AT peripheral devices, a first set of programmable interrupt controllers of the plurality of programmable interrupt controllers being disabled in a PC/AT-compatible mode and a second set of programmable interrupt controllers of the plurality of programmable interrupt controllers being enabled in a PC/AT-compatible mode.
Claim 3
Dependent Claim
31 words
The microcontroller of claim 1 , further comprising: an interrupt control register to selectively enable and disable programmable interrupt controllers of the plurality of programmable interrupt controllers in a PC/AT-compatible mode.
Claim 4
Dependent Claim
32 words
The microcontroller of claim 1 , further comprising: a plurality of programmable address registers to map the plurality of PC/AT peripheral devices to a set of address configurations in a PC/AT-compatible mode.
Claim 5
Dependent Claim
29 words
The microcontroller of claim 1 , further comprising: a plurality of timers including an 8254-compatible programmable interval timer to supply a PC/AT-compatible count pulse rate in a PC/AT-compatible mode.
Claim 6
Dependent Claim
30 words
The microcontroller of claim 4 , the plurality of timers comprising: a plurality of non-PC/AT-compatible timers, including a watchdog timer, a software timer, and a plurality of general purpose timers.
Claim 7
Dependent Claim
32 words
The microcontroller of claim 1 , wherein only a master programmable interrupt controller and a slave programmable interrupt controller of the plurality of programmable interrupt controllers are enabled in a PC/AT-compatible mode.
Claim 8
Dependent Claim
18 words
The microcontroller of claim 1 , wherein the plurality of programmable interrupt controllers comprise 8259-compatible programmable interrupt controllers.
Claim 9
Dependent Claim
34 words
The microcontroller of claim 1 , further comprising: a plurality of direct memory access controllers coupled to the general purpose bus including 8237-compatible direct memory access controllers to handle fly-by direct memory access transfers.
Claim 10
Dependent Claim
28 words
The microcontroller of claim 8 , wherein each direct memory access controller of the plurality of direct memory access controllers provides three 16-bit channels and four 8-bit channels.
Claim 11
Dependent Claim
18 words
The microcontroller of claim 1 , further comprising: a MC146818-compatible real-time clock coupled to the general purpose bus.
Claim 12
Dependent Claim
33 words
The microcontroller of claim 1 , the plurality of programmable interrupt controllers comprising: a non-maskable interrupt enable bit of an interrupt control register to enable a non-maskable interrupt signal in a PC/AT-compatible mode.
Claim 13
Dependent Claim
23 words
The microcontroller of claim 1 , further comprising: an input/output address space with a dedicated region for the plurality of PC/AT peripheral devices.
Claim 14
Dependent Claim
51 words
The microcontroller of claim 1 , the plurality of programmable interrupt controllers comprising: a master programmable interrupt controller and first slave programmable interrupt controller enabled in the PC/AT-compatible mode and a non-PC/AT-compatible mode; and a second slave programmable interrupt controller disabled in the PC/AT-compatible mode and enabled in the non-PC/AT-compatible mode.
Claim 15
Independent Claim
90 words
A method of configuring a microcontroller for PC/AT compatibility, the microcontroller including a bus, a plurality of programmable interrupt controllers coupled to the bus, and a plurality of PC/AT peripheral devices coupled to the bus, the method comprising the steps of: configuring the bus to emulate an industry standard architecture-compatible bus; and configuring the plurality of programmable interrupt controllers coupled to the bus to enable a master programmable interrupt controller and a slave programmable interrupt controller and to disable other programmable interrupt controllers of the plurality of programmable interrupt controllers.
Claim 16
Independent Claim
90 words
A method of configuring a microcontroller for PC/AT compatibility, the microcontroller including a bus, a plurality of programmable interrupt controllers coupled to the bus, and a plurality of PC/AT peripheral devices coupled to the bus, the method comprising the steps of: configuring the bus to emulate an industry standard architecture-compatible bus; and configuring the plurality of programmable interrupt controllers coupled to the bus to enable a master programmable interrupt controller and a slave programmable interrupt controller and to disable other programmable interrupt controllers of the plurality of programmable interrupt controllers.
Claim 17
Dependent Claim
39 words
The method of claim 14 , the microcontroller including a direct memory access controller having a PC/AT-compatible mode and a non-PC/AT-compatible mode, the method further comprising the step of: configuring the direct memory access controller for the PC/AT-compatible mode.
Claim 18
Dependent Claim
21 words
The method of claim 14 , further comprising the step of: configuring the microcontroller for connection to a super I/O controller.
Claim 19
Dependent Claim
127 words
A flexible PC/AT-compatible microcontroller, comprising: an 8088-compatible processor; a processor bus coupled to the 8088-compatible processor; a general purpose bus; a general purpose bus controller coupled between the processor bus and the general purpose bus, the general purpose bus controller, comprising: a means for configuring the general purpose bus to emulate an industry standard architecture-compatible bus; a plurality of PC/AT peripheral devices; a plurality of programmable interrupt controllers coupled to the general purpose bus and the plurality of PC/AT peripheral devices, the plurality of programmable interrupt controllers comprising: a means for configuring a first set of programmable interrupt controllers of the plurality of programmable interrupt controllers to be enabled and a second set of programmable interrupt controllers of the plurality of programmable interrupt controllers to be disabled.
Claim 20
Dependent Claim
127 words
A flexible PC/AT-compatible microcontroller, comprising: an 8088-compatible processor; a processor bus coupled to the 8088-compatible processor; a general purpose bus; a general purpose bus controller coupled between the processor bus and the general purpose bus, the general purpose bus controller, comprising: a means for configuring the general purpose bus to emulate an industry standard architecture-compatible bus; a plurality of PC/AT peripheral devices; a plurality of programmable interrupt controllers coupled to the general purpose bus and the plurality of PC/AT peripheral devices, the plurality of programmable interrupt controllers comprising: a means for configuring a first set of programmable interrupt controllers of the plurality of programmable interrupt controllers to be enabled and a second set of programmable interrupt controllers of the plurality of programmable interrupt controllers to be disabled.
Claim 21
Dependent Claim
21 words
The microcontroller of claim 17 , the plurality of programmable interrupt controllers comprising: a means to enable a non-maskable interrupt signal.
References Cited (Backward Citations)
US4438492A
Cited
US6163826A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-06-03 | 2005-12-03 | 2006-06-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-06-03 | 2009-12-03 | 2010-06-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-06-03 | 2013-12-03 | 2014-06-04 | $7700.00 | Window Closed / Lapsed |