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US6362055B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Method of gate doping by ion implantation

Assignee: Advanced Micro Devices Inc
•
Filing: 1998-08-31
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Granted: 2002-03-26
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Expires: 2018-08-31
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Abstract

Abstract A semiconductor device includes a first gate stack and a second gate stack, each gate stack corresponding to a gate of a FET formed on the semiconductor device. The first gate stack includes a gate material formed from one of poly-silicon, poly-SiGe, and amorphous silicon. The gate material is implanted with a dopant of a first conductivity type at a first concentration. A metal silicide layer is formed over the doped gate material. The second gate stack includes a gate material formed from one of poly-silicon, poly-Si—Ge, and amorphous silicon. The gate material of the second gate stack is implanted with a dopant of a second conductivity type at a second concentration.

Inventors

  • 👤 Ming-Ren Lin
  • 👤 Bin Yu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 03:23
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0172; H10D84/0177; H10D84/02; H10D84/03; H10D84/038

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 409 words
A method of forming a semiconductor device on a substrate, the method comprising: forming a gate oxide layer on the substrate; forming a gate material on the gate oxide layer; forming a first photo-resist on the gate material, the first photo-resist having at least one window positioned over a first portion of the gate material; implanting with an n+ type dopant of a first concentration, to thereby expose and implant the first portion of the gate material with the n+ type dopant of the first concentration, wherein only the first portion of the gate material above the substrate is doped during the implanting of the n+ dopant of the first concentration and wherein no regions within the substrate are doped with the n+ dopant of the first concentration; removing the first photo-resist; forming a second photo-resist on the gate material, the second photo-resist having at least one window positioned over a second portion of the gate material, the second portion being separate from the first portion; implanting with the n+ type dopant of a second concentration different from the first concentration, to thereby expose and implant the second portion of the gate material with the n+ type dopant of the second concentration, wherein only the second portion of the gate material above the substrate is doped during the implanting of the n+ dopant of the second concentration and wherein no regions within the substrate are doped with the n+ dopant of the second concentration; removing the second photo-resist, thereby exposing all portions of the gate material; depositing a metal silicide as a dopant barrier onto the gate material, thereby forming a metal silicide layer; providing a third photo-resist above the first and second portions of the gate material; etching the semiconductor device down to the substrate, thereby leaving a first gate stack corresponding to a location of the first portion of the gate material, and a second gate stack corresponding to a location of the second portion of the gate material; removing the third photo-resist, wherein the first gate stack corresponds to a gate of a first MOSFET of a first conductivity type having the first concentration, and the second gate stack corresponds to a gate of a second MOSFET of the first conductivity type having the second concentration; and doping the substrate to form at least one of a source and a drain region of the first and second MOSFETs after the step of depositing a metal silicide.
Claim 2
Independent Claim 409 words
A method of forming a semiconductor device on a substrate, the method comprising: forming a gate oxide layer on the substrate; forming a gate material on the gate oxide layer; forming a first photo-resist on the gate material, the first photo-resist having at least one window positioned over a first portion of the gate material; implanting with an n+ type dopant of a first concentration, to thereby expose and implant the first portion of the gate material with the n+ type dopant of the first concentration, wherein only the first portion of the gate material above the substrate is doped during the implanting of the n+ dopant of the first concentration and wherein no regions within the substrate are doped with the n+ dopant of the first concentration; removing the first photo-resist; forming a second photo-resist on the gate material, the second photo-resist having at least one window positioned over a second portion of the gate material, the second portion being separate from the first portion; implanting with the n+ type dopant of a second concentration different from the first concentration, to thereby expose and implant the second portion of the gate material with the n+ type dopant of the second concentration, wherein only the second portion of the gate material above the substrate is doped during the implanting of the n+ dopant of the second concentration and wherein no regions within the substrate are doped with the n+ dopant of the second concentration; removing the second photo-resist, thereby exposing all portions of the gate material; depositing a metal silicide as a dopant barrier onto the gate material, thereby forming a metal silicide layer; providing a third photo-resist above the first and second portions of the gate material; etching the semiconductor device down to the substrate, thereby leaving a first gate stack corresponding to a location of the first portion of the gate material, and a second gate stack corresponding to a location of the second portion of the gate material; removing the third photo-resist, wherein the first gate stack corresponds to a gate of a first MOSFET of a first conductivity type having the first concentration, and the second gate stack corresponds to a gate of a second MOSFET of the first conductivity type having the second concentration; and doping the substrate to form at least one of a source and a drain region of the first and second MOSFETs after the step of depositing a metal silicide.
Claim 3
Dependent Claim 14 words
The method according to claim 1 , wherein the first conductivity type is n.
Claim 4
Dependent Claim 23 words
The method according to claim 1 , wherein the at least one window of the first and second photo-resists are formed by photo-lithography.
Claim 5
Dependent Claim 17 words
The method according to claim 1 , wherein the first and second photo-resists are removed by stripping.
Claim 6
Dependent Claim 14 words
The method according to claim 1 , wherein the metal silicide is tungsten silicide.
Claim 7
Dependent Claim 17 words
The method according to claim 1 , wherein the n+ dopant is one of phosphorous and arsenic.
Claim 8
Dependent Claim 19 words
The method according to claim 1 , wherein the gate material is one of poly-Si, poly-SiGe, and amorphous silicon.
Claim 9
Independent Claim 409 words
A method of forming a semiconductor device on a substrate, the method comprising: forming a gate oxide layer on the substrate; forming a gate material on the gate oxide layer; forming a first photo-resist on the gate material, the first photo-resist having at least one window positioned over a first portion of the gate material; implanting with a p+ type dopant of a first concentration, to thereby expose and implant the first portion of the gate material with the p+ type dopant of the first concentration, wherein only the first portion of the gate material above the substrate is doped during the implanting of the p+ dopant of the first concentration and wherein no regions within the substrate are doped with the p+ dopant of the first concentration; removing the first photo-resist; forming a second photo-resist on the gate material, the second photo-resist having at least one window positioned over a second portion of the gate material, the second portion being separate from the first portion; implanting with the p+ type dopant of a second concentration different from the first concentration, to thereby expose and implant the second portion of the gate material with the p+ type dopant of the second concentration, wherein only the second portion of the gate material above the substrate is doped during the implanting of the p+ dopant of the second concentration and wherein no regions within the substrate are doped with the p+ dopant of the second concentration; removing the second photo-resist, thereby exposing all portions of the gate material; depositing a metal silicide as a dopant barrier onto the gate material, thereby forming a metal silicide layer; providing a third photo-resist above the first and second portions of the gate material; etching the semiconductor device down to the substrate, thereby leaving a first gate stack corresponding to a location of the first portion of the gate material, and a second gate stack corresponding to a location of the second portion of the gate material; removing the third photo-resist, wherein the first gate stack corresponds to a gate of a first MOSFET of a first conductivity type having the first concentration, and the second gate stack corresponds to a gate of a second MOSFET of the first conductivity type having the second concentration; and doping the substrate to form at least one of a source and a drain region of the first and second MOSFETs after the step of depositing a metal silicide.
Claim 10
Independent Claim 409 words
A method of forming a semiconductor device on a substrate, the method comprising: forming a gate oxide layer on the substrate; forming a gate material on the gate oxide layer; forming a first photo-resist on the gate material, the first photo-resist having at least one window positioned over a first portion of the gate material; implanting with a p+ type dopant of a first concentration, to thereby expose and implant the first portion of the gate material with the p+ type dopant of the first concentration, wherein only the first portion of the gate material above the substrate is doped during the implanting of the p+ dopant of the first concentration and wherein no regions within the substrate are doped with the p+ dopant of the first concentration; removing the first photo-resist; forming a second photo-resist on the gate material, the second photo-resist having at least one window positioned over a second portion of the gate material, the second portion being separate from the first portion; implanting with the p+ type dopant of a second concentration different from the first concentration, to thereby expose and implant the second portion of the gate material with the p+ type dopant of the second concentration, wherein only the second portion of the gate material above the substrate is doped during the implanting of the p+ dopant of the second concentration and wherein no regions within the substrate are doped with the p+ dopant of the second concentration; removing the second photo-resist, thereby exposing all portions of the gate material; depositing a metal silicide as a dopant barrier onto the gate material, thereby forming a metal silicide layer; providing a third photo-resist above the first and second portions of the gate material; etching the semiconductor device down to the substrate, thereby leaving a first gate stack corresponding to a location of the first portion of the gate material, and a second gate stack corresponding to a location of the second portion of the gate material; removing the third photo-resist, wherein the first gate stack corresponds to a gate of a first MOSFET of a first conductivity type having the first concentration, and the second gate stack corresponds to a gate of a second MOSFET of the first conductivity type having the second concentration; and doping the substrate to form at least one of a source and a drain region of the first and second MOSFETs after the step of depositing a metal silicide.
Claim 11
Dependent Claim 14 words
The method according to claim 8 , wherein the first conductivity type is p.
Claim 12
Dependent Claim 17 words
The method according to claim 8 , wherein the first and second photo-resists are removed by stripping.
Claim 13
Dependent Claim 13 words
The method according to claim 8 , wherein the p+ dopant is boron.
Claim 14
Independent Claim 371 words
A method of forming a semiconductor device on a substrate, the method comprising: forming a gate oxide layer on the substrate; forming a gate material on the gate oxide layer; forming a first photo-resist on the gate material, the first photo-resist having at least one window positioned over a first portion of the gate material; implanting with an n+ type dopant of a first concentration, to thereby expose and implant the first portion of the gate material with the n+ type dopant of the first concentration; removing the first photo-resist; forming a second photo-resist on the gate material, the second photo-resist having at least one window positioned over a second portion of the gate material, the second portion being separate from the first portion; implanting with the n+ type dopant of a second concentration different from the first concentration, to thereby expose and implant the second portion of the gate material with the n+ type dopant of the second concentration; removing the second photo-resist, thereby exposing all portions of the gate material; depositing a metal silicide as a dopant barrier onto the gate material, thereby forming a metal silicide layer; providing a third photo-resist above the first and second portions of the gate material; etching the semiconductor device down to the substrate, thereby leaving a first gate stack corresponding to a location of the first portion of the gate material, and a second gate stack corresponding to a location of the second portion of the gate material; removing the third photo-resist, wherein the first gate stack corresponds to a gate of a first MOSFET of a first conductivity type having the first concentration, and the second gate stack corresponds to a gate of a second MOSFET of the first conductivity type having the second concentration; annealing the gate of the first MOSFET and the gate of the second MOSFET; and doping the substrate to form at least one of a source and a drain region of the first and second MOSFETs after the step of depositing the metal silicide, wherein transistor drive current is improved by the annealing that is done before formation of the at least one of the source and the drain region of the first and second MOSFETs.
Claim 15
Independent Claim 371 words
A method of forming a semiconductor device on a substrate, the method comprising: forming a gate oxide layer on the substrate; forming a gate material on the gate oxide layer; forming a first photo-resist on the gate material, the first photo-resist having at least one window positioned over a first portion of the gate material; implanting with an n+ type dopant of a first concentration, to thereby expose and implant the first portion of the gate material with the n+ type dopant of the first concentration; removing the first photo-resist; forming a second photo-resist on the gate material, the second photo-resist having at least one window positioned over a second portion of the gate material, the second portion being separate from the first portion; implanting with the n+ type dopant of a second concentration different from the first concentration, to thereby expose and implant the second portion of the gate material with the n+ type dopant of the second concentration; removing the second photo-resist, thereby exposing all portions of the gate material; depositing a metal silicide as a dopant barrier onto the gate material, thereby forming a metal silicide layer; providing a third photo-resist above the first and second portions of the gate material; etching the semiconductor device down to the substrate, thereby leaving a first gate stack corresponding to a location of the first portion of the gate material, and a second gate stack corresponding to a location of the second portion of the gate material; removing the third photo-resist, wherein the first gate stack corresponds to a gate of a first MOSFET of a first conductivity type having the first concentration, and the second gate stack corresponds to a gate of a second MOSFET of the first conductivity type having the second concentration; annealing the gate of the first MOSFET and the gate of the second MOSFET; and doping the substrate to form at least one of a source and a drain region of the first and second MOSFETs after the step of depositing the metal silicide, wherein transistor drive current is improved by the annealing that is done before formation of the at least one of the source and the drain region of the first and second MOSFETs.
Claim 16
Independent Claim 371 words
A method of forming a semiconductor device on a substrate, the method comprising: forming a gate oxide layer on the substrate; forming a gate material on the gate oxide layer; forming a first photo-resist on the gate material, the first photo-resist having at least one window positioned over a first portion of the gate material; implanting with a p+ type dopant of a first concentration, to thereby expose and implant the first portion of the gate material with the p+ type dopant of the first concentration; removing the first photo-resist; forming a second photo-resist on the gate material, the second photo-resist having at least one window positioned over a second portion of the gate material, the second portion being separate from the first portion; implanting with the p+ type dopant of a second concentration different from the first concentration, to thereby expose and implant the second portion of the gate material with the p+ type dopant of the second concentration; removing the second photo-resist, thereby exposing all portions of the gate material; depositing a metal silicide as a dopant barrier onto the gate material, thereby forming a metal silicide layer; providing a third photo-resist above the first and second portions of the gate material; etching the semiconductor device down to the substrate, thereby leaving a first gate stack corresponding to a location of the first portion of the gate material, and a second gate stack corresponding to a location of the second portion of the gate material; removing the third photo-resist, wherein the first gate stack corresponds to a gate of a first MOSFET of a first conductivity type having the first concentration, and the second gate stack corresponds to a gate of a second MOSFET of the first conductivity type having the second concentration; annealing the gate of the first MOSFET and the gate of the second MOSFET; and doping the substrate to form at least one of a source and a drain region of the first and second MOSFETs after the step of depositing the metal silicide, wherein transistor drive current is improved by the annealing that is done before formation of the at least one of the source and the drain region of the first and second MOSFETs.
Claim 17
Independent Claim 371 words
A method of forming a semiconductor device on a substrate, the method comprising: forming a gate oxide layer on the substrate; forming a gate material on the gate oxide layer; forming a first photo-resist on the gate material, the first photo-resist having at least one window positioned over a first portion of the gate material; implanting with a p+ type dopant of a first concentration, to thereby expose and implant the first portion of the gate material with the p+ type dopant of the first concentration; removing the first photo-resist; forming a second photo-resist on the gate material, the second photo-resist having at least one window positioned over a second portion of the gate material, the second portion being separate from the first portion; implanting with the p+ type dopant of a second concentration different from the first concentration, to thereby expose and implant the second portion of the gate material with the p+ type dopant of the second concentration; removing the second photo-resist, thereby exposing all portions of the gate material; depositing a metal silicide as a dopant barrier onto the gate material, thereby forming a metal silicide layer; providing a third photo-resist above the first and second portions of the gate material; etching the semiconductor device down to the substrate, thereby leaving a first gate stack corresponding to a location of the first portion of the gate material, and a second gate stack corresponding to a location of the second portion of the gate material; removing the third photo-resist, wherein the first gate stack corresponds to a gate of a first MOSFET of a first conductivity type having the first concentration, and the second gate stack corresponds to a gate of a second MOSFET of the first conductivity type having the second concentration; annealing the gate of the first MOSFET and the gate of the second MOSFET; and doping the substrate to form at least one of a source and a drain region of the first and second MOSFETs after the step of depositing the metal silicide, wherein transistor drive current is improved by the annealing that is done before formation of the at least one of the source and the drain region of the first and second MOSFETs.

References Cited (Backward Citations)

US5723356A Cited
US5683941A Cited
US6051459A Cited
US6054354A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-03-25 2005-09-24 2006-03-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-03-25 2009-09-24 2010-03-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-03-25 2013-09-24 2014-03-26 $7700.00 Window Closed / Lapsed

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