Patent US1541467A successfully refreshed from Google Patents.
Patent US6345100B1 successfully refreshed from Google Patents.
US6345100B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Robust watermark method and apparatus for digital signals
Assignee: Microsoft Technology Licensing LLC
•
Filing: 1998-10-14
•
Granted: 2002-02-05
•
Expires: 2018-10-14
Abstract
Abstract Watermark data is encoded in a digitized signal by forming a noise threshold spectrum which represents a maximum amount of imperceptible noise, spread-spectrum chipping the noise threshold spectrum with a relatively endless stream of pseudo-random bits to form a basis signal, dividing the basis signal into segments, and filtering the segments to smooth segment boundaries. The data encoded in the watermark signal is precoded to make the watermark data inversion robust and is convolutional encoded to further increase the likelihood that the watermark data will subsequently be retrievable notwithstanding lossy processing of the watermarked signal.
Inventors
- 👤 Earl Levine
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 06:12
CPC Classifications
G; G06; G06T; G06T1/00; G06T1/0021; G06T1/005; G10; G10L; G10L19/00; H; H04; H04N; H04N21/00; H04N21/20; H04N21/23; H04N21/238; H04N21/2389; H04N21/23892; G06T2201/00; G06T2201/005; G06T2201/0065
Claims Analysis
Total Claims: 75
Claim 1
Independent Claim
101 words
A method for encoding embedded data in a digitized analog signal, the method comprising: processing the embedded data to form inversion-robust embedded data such that interpretation of the inversion-robust embedded data produces the embedded data and such that interpretation of the inversion-robust embedded data after inversion also produces the embedded data; and embedding the inversion-robust embedded data in the digitized analog signal to produce a resulting signal such that inversion of the resulting signal inverts the inversion-robust embedded data as embedded in the resulting signal wherein the step of processing comprises: applying a 1/(1 XOR D) precoder to the embedded data.
Claim 2
Independent Claim
101 words
A method for encoding embedded data in a digitized analog signal, the method comprising: processing the embedded data to form inversion-robust embedded data such that interpretation of the inversion-robust embedded data produces the embedded data and such that interpretation of the inversion-robust embedded data after inversion also produces the embedded data; and embedding the inversion-robust embedded data in the digitized analog signal to produce a resulting signal such that inversion of the resulting signal inverts the inversion-robust embedded data as embedded in the resulting signal wherein the step of processing comprises: applying a 1/(1 XOR D) precoder to the embedded data.
Claim 3
Independent Claim
105 words
A method for encoding embedded data in a digitized analog signal, the method comprising: (a) convolving the embedded data to produce convolved embedded data, the step of convolving including: (i) performing the following steps for each subject bit of the embedded data: (A) selecting two or more relevant bits of the embedded data according to a relation to the subject bit; (B) processing the two or more relevant bits to form two or more convolved bits which collectively represent the subject bit; and (C) including the convolved bits in the convolved embedded data; and (b) embedding the convolved embedded data in the digitized analog signal.
Claim 4
Independent Claim
105 words
A method for encoding embedded data in a digitized analog signal, the method comprising: (a) convolving the embedded data to produce convolved embedded data, the step of convolving including: (i) performing the following steps for each subject bit of the embedded data: (A) selecting two or more relevant bits of the embedded data according to a relation to the subject bit; (B) processing the two or more relevant bits to form two or more convolved bits which collectively represent the subject bit; and (C) including the convolved bits in the convolved embedded data; and (b) embedding the convolved embedded data in the digitized analog signal.
Claim 5
Dependent Claim
47 words
The method of claim 2 wherein the step of (b) embedding comprises: forming a basis signal from the digitized analog signal; encoding the convolved embedded data into the basis signal to form an encoded basis signal; and adding the encoded basis signal to the digitized analog signal.
Claim 6
Dependent Claim
27 words
The method of claim 2 wherein the relation to the subject bit is a position relative to a position of the subject bit within the embedded data.
Claim 7
Dependent Claim
51 words
The method of claim 2 wherein the step of (B) processing comprises: performing the following step for each selected one of the convolved bits: (1) selecting one or more selected ones of the two or more relevant bits; and (2) processing the selected relevant bits to produce the selected convolved bit.
Claim 8
Dependent Claim
20 words
The method of claim 5 wherein the selected relevant bits are odd in number for each of the convolved bits.
Claim 9
Dependent Claim
34 words
The method of claim 5 wherein the step of (1) selecting comprises: selecting one or more selected ones of the two or more relevant bits according to a second relation to the subject bit.
Claim 10
Dependent Claim
24 words
The method of claim 7 wherein the second relation is a position relative to a position of the subject bit within the embedded data.
Claim 11
Dependent Claim
29 words
The method of claim 5 wherein the step of (2) processing comprises: determining parity of the selected relevant bits to produce a parity bit as the selected convolved bit.
Claim 12
Dependent Claim
21 words
The method of claim 9 wherein the selected relevant bits are odd in number for each of the convolved bits .
Claim 13
Independent Claim
146 words
A method for encoding embedded data in a digitized analog signal, the method comprising: (a) processing the embedded data to form inversion-robust embedded data such that interpretation of the inversion-robust embedded data produces the embedded data and such that interpretation of the inversion-robust embedded data after inversion also produces the embedded data; (b) convolving the inversion-robust embedded data to produce convolved embedded data, the step of convolving including: (i) performing the following steps for each subject bit of the inversion-robust embedded data: (A) selecting two or more relevant bits of the inversion-robust embedded data according to a relation to the subject bit; (B) processing the two or more relevant bits to form two or more convolved bits which collectively represent the subject bit; and (C) including the convolved bits in the convolved embedded data; and (c) embedding the convolved embedded data in the digitized analog signal.
Claim 14
Independent Claim
146 words
A method for encoding embedded data in a digitized analog signal, the method comprising: (a) processing the embedded data to form inversion-robust embedded data such that interpretation of the inversion-robust embedded data produces the embedded data and such that interpretation of the inversion-robust embedded data after inversion also produces the embedded data; (b) convolving the inversion-robust embedded data to produce convolved embedded data, the step of convolving including: (i) performing the following steps for each subject bit of the inversion-robust embedded data: (A) selecting two or more relevant bits of the inversion-robust embedded data according to a relation to the subject bit; (B) processing the two or more relevant bits to form two or more convolved bits which collectively represent the subject bit; and (C) including the convolved bits in the convolved embedded data; and (c) embedding the convolved embedded data in the digitized analog signal.
Claim 15
Dependent Claim
22 words
The method of claim 11 wherein the step of (a) processing comprises: applying a 1/(1 XOR D) precoder to the embedded data.
Claim 16
Dependent Claim
47 words
The method of claim 11 wherein the step of (c) embedding comprises: forming a basis signal from the digitized analog signal; encoding the convolved embedded data into the basis signal to form an encoded basis signal; and adding the encoded basis signal to the digitized analog signal.
Claim 17
Independent Claim
91 words
A method for decoding embedded data from a digitized analog signal, the method comprising: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; and processing the preliminary embedded data in such a manner that results in specific data if the preliminary embedded data has been inverted and results in the specific data if the preliminary embedded data has not been inverted, wherein the specific data is the embedded data.
Claim 18
Independent Claim
91 words
A method for decoding embedded data from a digitized analog signal, the method comprising: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; and processing the preliminary embedded data in such a manner that results in specific data if the preliminary embedded data has been inverted and results in the specific data if the preliminary embedded data has not been inverted, wherein the specific data is the embedded data.
Claim 19
Dependent Claim
23 words
The method of claim 14 wherein the step of processing comprises: applying an inverse 1/(1 XOR D) precoder to the preliminary embedded data.
Claim 20
Independent Claim
64 words
A method for decoding embedded data from a digitized analog signal, the method comprising: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; and processing the preliminary embedded data using a Viterbi decoder to produce the embedded data from the preliminary data.
Claim 21
Independent Claim
64 words
A method for decoding embedded data from a digitized analog signal, the method comprising: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; and processing the preliminary embedded data using a Viterbi decoder to produce the embedded data from the preliminary data.
Claim 22
Dependent Claim
24 words
The method of claim 16 wherein the step of processing comprises: cycling the preliminary embedded data through the Viterbi decoder two or more times.
Claim 23
Dependent Claim
30 words
The method of claim 16 wherein processing comprises: determining parity according to an odd number of selected bits for each of a number of bits of the preliminary embedded data.
Claim 24
Independent Claim
110 words
A method for decoding embedded data from a digitized analog signal, the method comprising: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; processing the preliminary embedded data using a Viterbi decoder to produce the secondary embedded data from the preliminary data; and processing the secondary embedded data in such a manner that results in specific data if the digitized analog signal has been inverted and results in the specific data if the digitized analog signal has not been inverted, wherein the specific data is the embedded data.
Claim 25
Independent Claim
110 words
A method for decoding embedded data from a digitized analog signal, the method comprising: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; processing the preliminary embedded data using a Viterbi decoder to produce the secondary embedded data from the preliminary data; and processing the secondary embedded data in such a manner that results in specific data if the digitized analog signal has been inverted and results in the specific data if the digitized analog signal has not been inverted, wherein the specific data is the embedded data.
Claim 26
Dependent Claim
125 words
A computer readable medium useful in association with a computer which includes a processor and a memory, the computer readable medium including computer instructions which are configured to cause the computer to encode embedded data in a digitized analog signal by: processing the embedded data to form inversion-robust embedded data such that interpretation of the inversion-robust embedded data produces the embedded data and such that interpretation of the inversion-robust embedded data after inversion also produces the embedded data; and embedding the inversion-robust embedded data in the digitized analog signal to produce a resulting signal such that inversion of the resulting signal inverts the inversion-robust embedded data as embedded in the resulting signal wherein processing comprises: applying a 1/(1 XOR D) precoder to the embedded data.
Claim 27
Dependent Claim
125 words
A computer readable medium useful in association with a computer which includes a processor and a memory, the computer readable medium including computer instructions which are configured to cause the computer to encode embedded data in a digitized analog signal by: processing the embedded data to form inversion-robust embedded data such that interpretation of the inversion-robust embedded data produces the embedded data and such that interpretation of the inversion-robust embedded data after inversion also produces the embedded data; and embedding the inversion-robust embedded data in the digitized analog signal to produce a resulting signal such that inversion of the resulting signal inverts the inversion-robust embedded data as embedded in the resulting signal wherein processing comprises: applying a 1/(1 XOR D) precoder to the embedded data.
Claim 28
Dependent Claim
132 words
A computer readable medium useful in association with a computer which includes a processor and a memory, the computer readable medium including computer instructions which are configured to cause the computer to encode embedded data in a digitized analog signal by: (a) convolving the embedded data to produce convolved embedded data, the step of convolving including: (i) performing the following steps for each subject bit of the embedded data: (A) selecting two or more relevant bits of the embedded data according to a relation to the subject bit; (B) processing the two or more relevant bits to form two or more convolved bits which collectively represent the subject bit; and (C) including the convolved bits in the convolved embedded data; and (b) embedding the convolved embedded data in the digitized analog signal.
Claim 29
Dependent Claim
132 words
A computer readable medium useful in association with a computer which includes a processor and a memory, the computer readable medium including computer instructions which are configured to cause the computer to encode embedded data in a digitized analog signal by: (a) convolving the embedded data to produce convolved embedded data, the step of convolving including: (i) performing the following steps for each subject bit of the embedded data: (A) selecting two or more relevant bits of the embedded data according to a relation to the subject bit; (B) processing the two or more relevant bits to form two or more convolved bits which collectively represent the subject bit; and (C) including the convolved bits in the convolved embedded data; and (b) embedding the convolved embedded data in the digitized analog signal.
Claim 30
Dependent Claim
46 words
The computer readable medium of claim 21 wherein (b) embedding comprises: forming a basis signal from the digitized analog signal; encoding the convolved embedded data into the basis signal to form an encoded basis signal; and adding the encoded basis signal to the digitized analog signal.
Claim 31
Dependent Claim
29 words
The computer readable medium of claim 21 wherein the relation to the subject bit is a position relative to a position of the subject bit within the embedded data.
Claim 32
Dependent Claim
50 words
The computer readable medium of claim 21 wherein (B) processing comprises: performing the following step for each selected one of the convolved bits: (1) selecting one or more selected ones of the two or more relevant bits; and (2) processing the selected relevant bits to produce the selected convolved bit.
Claim 33
Dependent Claim
22 words
The computer readable medium of claim 24 wherein the selected relevant bits are odd in number for each of the convolved bits.
Claim 34
Dependent Claim
33 words
The computer readable medium of claim 24 wherein (1) selecting comprises: selecting one or more selected ones of the two or more relevant bits according to a second relation to the subject bit.
Claim 35
Dependent Claim
26 words
The computer readable medium of claim 26 wherein the second relation is a position relative to a position of the subject bit within the embedded data.
Claim 36
Dependent Claim
28 words
The computer readable medium of claim 24 wherein (2) processing comprises: determining parity of the selected relevant bits to produce a parity bit as the selected convolved bit.
Claim 37
Dependent Claim
22 words
The computer readable medium of claim 28 wherein the selected relevant bits are odd in number for each of the convolved bits.
Claim 38
Dependent Claim
173 words
A computer readable medium useful in association with a computer which includes a processor and a memory, the computer readable medium including computer instructions which are configured to cause the computer to encode embedded data in a digitized analog signal by: (a) processing the embedded data to form inversion-robust embedded data such that interpretation of the inversion-robust embedded data produces the embedded data and such that interpretation of the inversion-robust embedded data after inversion also produces the embedded data; (b) convolving the inversion-robust embedded data to produce convolved embedded data, the step of convolving including: (i) performing the following steps for each subject bit of the inversion-robust embedded data: (A) selecting two or more relevant bits of the inversion-robust embedded data according to a relation to the subject bit; (B) processing the two or more relevant bits to form two or more convolved bits which collectively represent the subject bit; and (C) including the convolved bits in the convolved embedded data; and (c) embedding the convolved embedded data in the digitized analog signal.
Claim 39
Dependent Claim
173 words
A computer readable medium useful in association with a computer which includes a processor and a memory, the computer readable medium including computer instructions which are configured to cause the computer to encode embedded data in a digitized analog signal by: (a) processing the embedded data to form inversion-robust embedded data such that interpretation of the inversion-robust embedded data produces the embedded data and such that interpretation of the inversion-robust embedded data after inversion also produces the embedded data; (b) convolving the inversion-robust embedded data to produce convolved embedded data, the step of convolving including: (i) performing the following steps for each subject bit of the inversion-robust embedded data: (A) selecting two or more relevant bits of the inversion-robust embedded data according to a relation to the subject bit; (B) processing the two or more relevant bits to form two or more convolved bits which collectively represent the subject bit; and (C) including the convolved bits in the convolved embedded data; and (c) embedding the convolved embedded data in the digitized analog signal.
Claim 40
Dependent Claim
21 words
The computer readable medium of claim 30 wherein (a) processing comprises: applying a 1/(1 XOR D) precoder to the embedded data.
Claim 41
Dependent Claim
46 words
The computer readable medium of claim 30 wherein (c) embedding comprises: forming a basis signal from the digitized analog signal; encoding the convolved embedded data into the basis signal to form an encoded basis signal; and adding the encoded basis signal to the digitized analog signal.
Claim 42
Dependent Claim
118 words
A computer readable medium useful in association with a computer which includes a processor and a memory, the computer readable medium including computer instructions which are configured to cause the computer to decode embedded data from a digitized analog signal by: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; and processing the preliminary embedded data in such a manner that results in specific data if the preliminary embedded data has been inverted and results in the specific data if the preliminary embedded data has not been inverted, wherein the specific data is the embedded data.
Claim 43
Dependent Claim
118 words
A computer readable medium useful in association with a computer which includes a processor and a memory, the computer readable medium including computer instructions which are configured to cause the computer to decode embedded data from a digitized analog signal by: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; and processing the preliminary embedded data in such a manner that results in specific data if the preliminary embedded data has been inverted and results in the specific data if the preliminary embedded data has not been inverted, wherein the specific data is the embedded data.
Claim 44
Dependent Claim
22 words
The computer readable medium of claim 33 wherein processing comprises: applying an inverse 1/(1 XOR D) precoder to the preliminary embedded data.
Claim 45
Dependent Claim
91 words
A computer readable medium useful in association with a computer which includes a processor and a memory, the computer readable medium including computer instructions which are configured to cause the computer to decode embedded data from a digitized analog signal by: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; and processing the preliminary embedded data using a Viterbi decoder to produce the embedded data from the preliminary data.
Claim 46
Dependent Claim
91 words
A computer readable medium useful in association with a computer which includes a processor and a memory, the computer readable medium including computer instructions which are configured to cause the computer to decode embedded data from a digitized analog signal by: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; and processing the preliminary embedded data using a Viterbi decoder to produce the embedded data from the preliminary data.
Claim 47
Dependent Claim
23 words
The computer readable medium of claim 35 wherein processing comprises: cycling the preliminary embedded data through the Viterbi decoder two or more times.
Claim 48
Dependent Claim
32 words
The computer readable medium of claim 39 wherein processing comprises: determining parity according to an odd number of selected bits for each of a number of bits of the preliminary embedded data.
Claim 49
Dependent Claim
137 words
A computer readable medium useful in association with a computer which includes a processor and a memory, the computer readable medium including computer instructions which are configured to cause the computer to decode embedded data from a digitized analog signal by: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; processing the preliminary embedded data using a Viterbi decoder to produce the secondary embedded data from the preliminary data; and processing the secondary embedded data in such a manner that results in specific data if the digitized analog signal has been inverted and results in the specific data if the digitized analog signal has not been inverted, wherein the specific data is the embedded data.
Claim 50
Dependent Claim
137 words
A computer readable medium useful in association with a computer which includes a processor and a memory, the computer readable medium including computer instructions which are configured to cause the computer to decode embedded data from a digitized analog signal by: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; processing the preliminary embedded data using a Viterbi decoder to produce the secondary embedded data from the preliminary data; and processing the secondary embedded data in such a manner that results in specific data if the digitized analog signal has been inverted and results in the specific data if the digitized analog signal has not been inverted, wherein the specific data is the embedded data.
Claim 51
Dependent Claim
131 words
A computer system comprising: a processor; a memory operatively coupled to the processor; and an encoding module (i) which executes in the processor from the memory and (ii) which when executed by the processor, causes the computer to encode embedded data in a digitized analog signal by: processing the embedded data to form inversion-robust embedded data such that interpretation of the inversion-robust embedded data produces the embedded data and such that interpretation of the inversion-robust embedded data after inversion also produces the embedded data; and embedding the inversion-robust embedded data in the digitized analog signal to produce a resulting signal such that inversion of the resulting signal inverts the inversion-robust embedded data as embedded in the resulting signal wherein processing comprises: applying a 1/(1 XOR D) precoder to the embedded data.
Claim 52
Dependent Claim
131 words
A computer system comprising: a processor; a memory operatively coupled to the processor; and an encoding module (i) which executes in the processor from the memory and (ii) which when executed by the processor, causes the computer to encode embedded data in a digitized analog signal by: processing the embedded data to form inversion-robust embedded data such that interpretation of the inversion-robust embedded data produces the embedded data and such that interpretation of the inversion-robust embedded data after inversion also produces the embedded data; and embedding the inversion-robust embedded data in the digitized analog signal to produce a resulting signal such that inversion of the resulting signal inverts the inversion-robust embedded data as embedded in the resulting signal wherein processing comprises: applying a 1/(1 XOR D) precoder to the embedded data.
Claim 53
Dependent Claim
138 words
A computer system comprising: a processor; a memory operatively coupled to the processor; and an encoding module (i) which executes in the processor from the memory and (ii) which, when executed by the processor, causes the computer to encode embedded data in a digitized analog signal by: (a) convolving the embedded data to produce convolved embedded data, the step of convolving including: (i) performing the following steps for each subject bit of the embedded data: (A) selecting two or more relevant bits of the embedded data according to a relation to the subject bit; (B) processing the two or more relevant bits to form two or more convolved bits which collectively represent the subject bit; and (C) including the convolved bits in the convolved embedded data; and (b) embedding the convolved embedded data in the digitized analog signal.
Claim 54
Dependent Claim
138 words
A computer system comprising: a processor; a memory operatively coupled to the processor; and an encoding module (i) which executes in the processor from the memory and (ii) which, when executed by the processor, causes the computer to encode embedded data in a digitized analog signal by: (a) convolving the embedded data to produce convolved embedded data, the step of convolving including: (i) performing the following steps for each subject bit of the embedded data: (A) selecting two or more relevant bits of the embedded data according to a relation to the subject bit; (B) processing the two or more relevant bits to form two or more convolved bits which collectively represent the subject bit; and (C) including the convolved bits in the convolved embedded data; and (b) embedding the convolved embedded data in the digitized analog signal.
Claim 55
Dependent Claim
45 words
The computer system of claim 40 wherein (b) embedding comprises: forming a basis signal from the digitized analog signal; encoding the convolved embedded data into the basis signal to form an encoded basis signal; and adding the encoded basis signal to the digitized analog signal.
Claim 56
Dependent Claim
28 words
The computer system of claim 40 wherein the relation to the subject bit is a position relative to a position of the subject bit within the embedded data.
Claim 57
Dependent Claim
49 words
The computer system of claim 40 wherein (B) processing comprises: performing the following step for each selected one of the convolved bits: (1) selecting one or more selected ones of the two or more relevant bits; and (2) processing the selected relevant bits to produce the selected convolved bit.
Claim 58
Dependent Claim
21 words
The computer system of claim 43 wherein the selected relevant bits are odd in number for each of the convolved bits.
Claim 59
Dependent Claim
32 words
The computer system of claim 43 wherein (1) selecting comprises: selecting one or more selected ones of the two or more relevant bits according to a second relation to the subject bit.
Claim 60
Dependent Claim
25 words
The computer system of claim 45 wherein the second relation is a position relative to a position of the subject bit within the embedded data.
Claim 61
Dependent Claim
27 words
The computer system of claim 43 wherein (2) processing comprises: determining parity of the selected relevant bits to produce a parity bit as the selected convolved bit.
Claim 62
Dependent Claim
21 words
The computer system of claim 47 wherein the selected relevant bits are odd in number for each of the convolved bits.
Claim 63
Dependent Claim
179 words
A computer system comprising: a processor; a memory operatively coupled to the processor; and an encoding module (i) which executes in the processor from the memory and (ii) which, when executed by the processor, causes the computer to encode embedded data in a digitized analog signal by: (a) processing the embedded data to form inversion-robust embedded data such that interpretation of the inversion-robust embedded data produces the embedded data and such that interpretation of the inversion-robust embedded data after inversion also produces the embedded data; (b) convolving the inversion-robust embedded data to produce convolved embedded data, the step of convolving including: (i) performing the following steps for each subject bit of the inversion-robust embedded data: (A) selecting two or more relevant bits of the inversion-robust embedded data according to a relation to the subject bit; (B) processing the two or more relevant bits to form two or more convolved bits which collectively represent the subject bit; and (C) including the convolved bits in the convolved embedded data; and (c) embedding the convolved embedded data in the digitized analog signal.
Claim 64
Dependent Claim
179 words
A computer system comprising: a processor; a memory operatively coupled to the processor; and an encoding module (i) which executes in the processor from the memory and (ii) which, when executed by the processor, causes the computer to encode embedded data in a digitized analog signal by: (a) processing the embedded data to form inversion-robust embedded data such that interpretation of the inversion-robust embedded data produces the embedded data and such that interpretation of the inversion-robust embedded data after inversion also produces the embedded data; (b) convolving the inversion-robust embedded data to produce convolved embedded data, the step of convolving including: (i) performing the following steps for each subject bit of the inversion-robust embedded data: (A) selecting two or more relevant bits of the inversion-robust embedded data according to a relation to the subject bit; (B) processing the two or more relevant bits to form two or more convolved bits which collectively represent the subject bit; and (C) including the convolved bits in the convolved embedded data; and (c) embedding the convolved embedded data in the digitized analog signal.
Claim 65
Dependent Claim
20 words
The computer system of claim 49 wherein (a) processing comprises: applying a 1/(1 XOR D) precoder to the embedded data.
Claim 66
Dependent Claim
45 words
The computer system of claim 49 wherein (c) embedding comprises: forming a basis signal from the digitized analog signal; encoding the convolved embedded data into the basis signal to form an encoded basis signal; and adding the encoded basis signal to the digitized analog signal.
Claim 67
Dependent Claim
124 words
A computer system comprising: a processor; a memory operatively coupled to the processor; and a decoding module (i) which executes in the processor from the memory and (ii) which, when executed by the processor, causes the computer to decode embedded data from a digitized analog signal by: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; and processing the preliminary embedded data in such a manner that results in specific data if the preliminary embedded data has been inverted and results in the specific data if the preliminary embedded data has not been inverted, wherein the specific data is the embedded data.
Claim 68
Dependent Claim
124 words
A computer system comprising: a processor; a memory operatively coupled to the processor; and a decoding module (i) which executes in the processor from the memory and (ii) which, when executed by the processor, causes the computer to decode embedded data from a digitized analog signal by: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; and processing the preliminary embedded data in such a manner that results in specific data if the preliminary embedded data has been inverted and results in the specific data if the preliminary embedded data has not been inverted, wherein the specific data is the embedded data.
Claim 69
Dependent Claim
21 words
The computer system of claim 52 wherein processing comprises: applying an inverse 1/(1 XOR D) precoder to the preliminary embedded data.
Claim 70
Dependent Claim
97 words
A computer system comprising: a processor; a memory operatively coupled to the processor; and an encoding module (i) which executes in the processor from the memory and (ii) which, when executed by the processor, causes the computer to decode embedded data from a digitized analog signal by: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; and processing the preliminary embedded data using a Viterbi decoder to produce the embedded data from the preliminary data.
Claim 71
Dependent Claim
97 words
A computer system comprising: a processor; a memory operatively coupled to the processor; and an encoding module (i) which executes in the processor from the memory and (ii) which, when executed by the processor, causes the computer to decode embedded data from a digitized analog signal by: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; and processing the preliminary embedded data using a Viterbi decoder to produce the embedded data from the preliminary data.
Claim 72
Dependent Claim
22 words
The computer system of claim 54 wherein processing comprises: cycling the preliminary embedded data through the Viterbi decoder two or more times.
Claim 73
Dependent Claim
31 words
The computer system of claim 54 wherein processing comprises: determining parity according to an odd number of selected bits for each of a number of bits of the preliminary embedded data.
Claim 74
Dependent Claim
143 words
A computer system comprising: a processor; a memory operatively coupled to the processor; and a decoding module (i) which executes in the processor from the memory and (ii) which, when executed by the processor, causes the computer to decode embedded data from a digitized analog signal by: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; processing the preliminary embedded data using a Viterbi decoder to produce the secondary embedded data from the preliminary data; and processing the secondary embedded data in such a manner that results in specific data if the digitized analog signal has been inverted and results in the specific data if the digitized analog signal has not been inverted, wherein the specific data is the embedded data.
Claim 75
Dependent Claim
143 words
A computer system comprising: a processor; a memory operatively coupled to the processor; and a decoding module (i) which executes in the processor from the memory and (ii) which, when executed by the processor, causes the computer to decode embedded data from a digitized analog signal by: forming a basis signal from the digitized analog signal; correlating the basis signal with the digitized analog signal to form a correlation signal; decoding preliminary embedded data from the correlation signal; processing the preliminary embedded data using a Viterbi decoder to produce the secondary embedded data from the preliminary data; and processing the secondary embedded data in such a manner that results in specific data if the digitized analog signal has been inverted and results in the specific data if the digitized analog signal has not been inverted, wherein the specific data is the embedded data.
References Cited (Backward Citations)
US5734891A
Cited
US5734823A
Cited
US5721788A
Cited
US5418713A
Cited
US5794217A
Cited
US5768426A
Cited
US5684920A
Cited
US5636276A
Cited
US5651090A
Cited
US5732188A
Cited
US5727119A
Cited
US5727092A
Cited
US5613004A
Cited
US5930369A
Cited
US5960390A
Cited
US5956674A
Cited
US5889868A
Cited
US5933798A
Cited
US5825892A
Cited
US5960081A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-02-04 | 2005-08-06 | 2006-02-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-02-04 | 2009-08-06 | 2010-02-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-02-04 | 2013-08-06 | 2014-02-05 | $7700.00 | Window Closed / Lapsed |