US6329704B1
Expired / Lapsed
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Ultra-shallow junction dopant layer having a peak concentration within a dielectric layer
Assignee: GlobalFoundries Inc
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Filing: 1999-12-09
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Granted: 2001-12-11
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Expires: 2019-12-09
Abstract
Abstract A process for forming an ultra-shallow junction depth, doped region within a silicon substrate. The process includes forming a dielectric film on the substrate, then implanting an ionic dopant species into the structure. The profile of the implanted species includes a population implanted through the dielectric film and into the silicon substrate, and a peak concentration deliberately confined in the dielectric film in close proximity to the interface between the dielectric film and the silicon substrate. A high-energy, low-dosage implant process is used and produces a structure that is substantially free of dislocation loops and other defect clusters. An annealing process is used to drive the peak concentration closer to the interface, and some of the population of the originally implanted species from the dielectric film into the silicon substrate. A low thermal budget is maintained because of the proximity of the as-implanted peak concentration to the interface and the presence of species implanted through the dielectric film and into the substrate.
Inventors
- 👤 Hiroyuki Akatsu
- 👤 Omer H. Dokumaci
- 👤 Suryanarayan G. Hegde
- 👤 Yujun Li
- 👤 Rajesh Rengarajan
- 👤 Paul A. Ronsheim
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:26
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10P30/21; H10P30/212; H10P30/28; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/141; H10P32/17; H10P32/171; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
102 words
A semiconductor device comprising: a silicon substrate having a top surface; a dielectric film formed over the top surface of the silicon substrate, the dielectric film having an upper surface and a lower surface creating an interface with the top surface of said silicon substrate; and a population of dopant species having a sufficiently low concentration that defects which cannot be corrected by annealing are avoided and having an annealed peak concentration within said dielectric film and closer to said interface than said upper surface, wherein at least some of said population of said dopant species is disposed within said silicon substrate.
Claim 2
Dependent Claim
102 words
A semiconductor device comprising: a silicon substrate having a top surface; a dielectric film formed over the top surface of the silicon substrate, the dielectric film having an upper surface and a lower surface creating an interface with the top surface of said silicon substrate; and a population of dopant species having a sufficiently low concentration that defects which cannot be corrected by annealing are avoided and having an annealed peak concentration within said dielectric film and closer to said interface than said upper surface, wherein at least some of said population of said dopant species is disposed within said silicon substrate.
Claim 3
Dependent Claim
20 words
The semiconductor device as in claim 1 , wherein said dielectric film has a thickness of less than 200 Angstroms.
Claim 4
Dependent Claim
19 words
The semiconductor device as in claim 1 , wherein said dielectric film comprises a thermally grown silicon dioxide film.
Claim 5
Dependent Claim
14 words
The semiconductor device as in claim 1 , wherein said dopant species comprises arsenic.
Claim 6
Dependent Claim
18 words
The semiconductor device as in claim 1 , wherein said dopant species comprises one of boron and phosphorus.
Claim 7
Dependent Claim
17 words
The semiconductor device as in claim 1 , wherein said dielectric film comprises a silicon nitride film.
Claim 8
Dependent Claim
113 words
A source-drain extension region of a transistor device formed within a silicon substrate having a top surface, said source/drain extension region comprising: a dielectric film formed over the top surface of the silicon substrate, the dielectric film having an upper surface and a lower surface creating an interface with the top surface of said silicon substrate; and a population of dopant species having a sufficiently low concentration that defects which cannot be corrected by annealing are avoided and having an annealed peak concentration within said dielectric film and closer to said interface than said upper surface, wherein at least some of said population of said dopant species is disposed within said silicon substrate.
Claim 9
Dependent Claim
113 words
A source-drain extension region of a transistor device formed within a silicon substrate having a top surface, said source/drain extension region comprising: a dielectric film formed over the top surface of the silicon substrate, the dielectric film having an upper surface and a lower surface creating an interface with the top surface of said silicon substrate; and a population of dopant species having a sufficiently low concentration that defects which cannot be corrected by annealing are avoided and having an annealed peak concentration within said dielectric film and closer to said interface than said upper surface, wherein at least some of said population of said dopant species is disposed within said silicon substrate.
References Cited (Backward Citations)
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