Patent US6307356B1 successfully refreshed from Google Patents.
US6307356B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Voltage mode feedback burst mode circuit
Assignee: Analog Devices International ULC
•
Filing: 1998-06-18
•
Granted: 2001-10-23
•
Expires: 2018-06-18
Abstract
Abstract A voltage-mode feedback switching regulator circuit capable of automatically entering and exiting burst mode is provided. When the load current is low, the switching regulator utilizes a fixed minimum non-zero duty cycle generator to override a pulse-width modulator generator and provide a minimum ON-cycle to a power switch in the switching regulator. This drives the required duty cycle generated by the pulse-width modulator lower. When the pulse-width modulator is driven so low that it requires a zero duty cycle, digital logic, which has been receiving the duty cycle of the pulse-width modulator, commands the switching regulator to enter burst mode and shut down. This principle can be utilized in either a non-synchronous or synchronous switching regulator with small modifications. In addition, the principle can be utilized for both step-down and step-up configurations.
Inventors
- 👤 David M. Dwelley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 03:35
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/10; H02M3/145; H02M3/155; H02M3/156
Claims Analysis
Total Claims: 29
Claim 1
Independent Claim
116 words
A non-synchronous voltage-mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode, said switching regulator comprising: a switch circuit having a duty cycle; a pulse-width modulator (PWM) circuit having a PWM generator, an independent fixed minimum non-zero duty cycle generator, an input and an output, said PWM circuit output coupled to said switch circuit said switching regulator entering and exiting burst mode based on signals provided by said PWM circuit; and a feedback circuit coupled between said switching regulator output and said PWM generator input that provides a feedback signal to said PWM circuit that is derived from the voltage at said switching regulator output.
Claim 2
Dependent Claim
116 words
A non-synchronous voltage-mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode, said switching regulator comprising: a switch circuit having a duty cycle; a pulse-width modulator (PWM) circuit having a PWM generator, an independent fixed minimum non-zero duty cycle generator, an input and an output, said PWM circuit output coupled to said switch circuit said switching regulator entering and exiting burst mode based on signals provided by said PWM circuit; and a feedback circuit coupled between said switching regulator output and said PWM generator input that provides a feedback signal to said PWM circuit that is derived from the voltage at said switching regulator output.
Claim 3
Dependent Claim
73 words
The switching regulator defined in claim 1 wherein said switch circuit comprises: a switching element having a first end and a second end, said first end coupled to said switching regulator input; an inductor coupled between said second end of said switching element and said switching regulator output; a diode coupled between said second end of said switching element and ground; and an output capacitor coupled between said switching regulator output and ground.
Claim 4
Dependent Claim
122 words
The switching regulator defined in claim 1 wherein said PWM generator comprises a first input coupled to said feedback circuit, a second input, and an output, said fixed minimum non-zero duty cycle generator comprises an input and an output, and said PWM circuit further comprising: a master clock having a first output coupled to said second input of said PWM generator, a second output coupled to said fixed minimum non-zero duty cycle generator input, and a third output; a logic circuit having a first input coupled to said PWM generator output, a second input coupled to said fixed minimum non-zero duty cycle generator output, a third input coupled to said master clock third output, and an output coupled to said switch circuit.
Claim 5
Dependent Claim
111 words
The switching regulator defined in claim 3 wherein said logic circuit comprises: a burst flip-flop having a D-input coupled to said PWM generator output, a clock input coupled to said third clock output and a Q-output; an OR gate having a first input coupled to said PWM generator output, a second input coupled to said fixed minimum non-zero duty cycle generator output, and an output; and an AND gate having a first input coupled to said OR gate output, a second input coupled to said Q-output of said burst flip-flop, and an output coupled to said switch circuit such that said AND gate sets said duty cycle for said switch circuit.
Claim 6
Dependent Claim
43 words
The switching regulator defined in claim 1 wherein said feedback circuit comprises a feedback amplifier having a positive terminal coupled to a reference voltage, a negative terminal coupled to said switching regulator output, and an output terminal coupled to said PWM circuit input.
Claim 7
Dependent Claim
130 words
A synchronous voltage-mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode comprising: a switch circuit having a first duty cycle and a second duty cycle, said second duty cycle substantially out-of-phase with said first duty cycle; a pulse-width modulator (PWM) circuit having a PWM generator, an independent fixed minimum non-zero duty cycle generator, an input and an output, said PWM circuit output coupled to said switch circuit said switching regulator entering and exiting burst mode based on signals provided by said PWM circuit; and a feedback circuit coupled between said switching regulator output and said PWM circuit input that provides a feedback signal to said PWM circuit that is derived from the voltage at said switching regulator output.
Claim 8
Dependent Claim
130 words
A synchronous voltage-mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode comprising: a switch circuit having a first duty cycle and a second duty cycle, said second duty cycle substantially out-of-phase with said first duty cycle; a pulse-width modulator (PWM) circuit having a PWM generator, an independent fixed minimum non-zero duty cycle generator, an input and an output, said PWM circuit output coupled to said switch circuit said switching regulator entering and exiting burst mode based on signals provided by said PWM circuit; and a feedback circuit coupled between said switching regulator output and said PWM circuit input that provides a feedback signal to said PWM circuit that is derived from the voltage at said switching regulator output.
Claim 9
Dependent Claim
128 words
The switching regulator defined in claim 6 wherein said switch circuit comprises: a first switching element having a first end and a second end, said first end coupled to said switching regulator input, said first switching element being connected to said PWM circuit such that said first switching element opens and closes in response to said first duty cycle as supplied by said PWM circuit; an inductor coupled between said second end of said first switching element and said switching regulator output; a second switching element coupled between said PWM circuit output and said second end of said first switching element, said second switching element opening and closing partially in response to said second duty cycle; and an output capacitor coupled between said switching regulator output and ground.
Claim 10
Dependent Claim
148 words
The switching regulator defined in claim 7 wherein said second switching element comprises: a comparator having a negative terminal, a positive terminal, and an output terminal, said positive terminal coupled to said second end of said first switching element, said negative terminal coupled to ground; a rising edge detector having an input connected to said comparator output terminal and an output; an RS-latch flip-flop having an R-input, an S-input and a Q-output, said S-input coupled to said rising edge detector output, said R-input coupled to said PWM circuit output; and a NOR gate having a first input, a second input and an output, said first input connected to said PWM circuit output, said second input connected to said Q-output of said RS-latch flip-flop, and said NOR gate output connected to said second switching element, such that said NOR gate provides said duty cycle for said second switching element.
Claim 11
Dependent Claim
164 words
The switching regulator defined in claim 7 wherein said second switching element comprises: a resistive element, coupled between said second end of said second switching element and ground; a comparator having a negative terminal, a positive terminal, and an output terminal, said positive terminal coupled to said first end of said first switching element, said negative terminal coupled to ground; a rising edge detector having an input connected to said comparator output terminal and an output; an RS-latch flip-flop having an R-input, an S-input and a Q-output, said S-input coupled to said rising edge detector output, said R-input coupled to said PWM circuit output; and a NOR gate having a first input, a second input and an output, said first input connected to said PWM circuit output, said second input connected to said Q-output of said RS-latch flip-flop, and said NOR gate output connected to said second switching element, such that the output of said NOR gate opens and closes said second switching element.
Claim 12
Dependent Claim
164 words
The switching regulator defined in claim 7 wherein said second switching element comprises: a resistive element, coupled between said second end of said second switching element and ground; a comparator having a negative terminal, a positive terminal, and an output terminal, said positive terminal coupled to said second end of said second switching element, said negative terminal coupled to ground; a rising edge detector having an input connected to said comparator output terminal and an output; an RS-latch flip-flop having an R-input, an S-input and a Q-output, said S-input coupled to said rising edge detector output, said R-input coupled to said PWM circuit output; and a NOR gate having a first input, a second input and an output, said first input connected to said PWM circuit output, said second input connected to said Q-output of said RS-latch flip-flop, and said NOR gate output connected to said second switching element, such that the output of said NOR gate opens and closes said second switching element.
Claim 13
Dependent Claim
144 words
The switching regulator defined in claim 6 wherein said PWM generator comprises a first input coupled to said feedback circuit, a second input, and an output, said fixed minimum non-zero duty cycle generator comprises an input and an output, and said PWM circuit further comprises: a fixed minimum non-zero duty cycle generator having an input and an output; a master clock having a first output coupled to said second input of said PWM generator, a second output coupled to said fixed minimum non-zero duty cycle generator input, and a third output coupled to said clock input of said burst flip-flop; a logic circuit having a first input coupled to said PWM generator output, a second input coupled to said fixed minimum non-zero duty cycle generator output, a third input coupled to said master clock third output, and an output coupled to said switch circuit.
Claim 14
Dependent Claim
134 words
The switching regulator defined in claim 11 wherein said logic circuit comprises: a burst flip-flop having a D-input coupled to said PWM generator output, a clock input and a Q-output; a master clock having a first output coupled to said second input of said PWM generator, a second output coupled to said fixed minimum non-zero duty cycle generator input, and a third output coupled to said clock input of said burst flip-flop; an OR gate having a first input coupled to said PWM generator output, a second input coupled to said fixed minimum non-zero duty cycle generator output, and an output; and an AND gate having a first input coupled to said OR gate output, a second input coupled to said Q-output of said burst flip-flop, and an output coupled to said switch circuit.
Claim 15
Dependent Claim
42 words
The switching regulator defined in claim 6 wherein said feedback circuit comprises a feedback amplifier having a positive terminal coupled to a reference voltage, a negative terminal coupled to said switching regulator output, and an output terminal coupled to said PWM circuit.
Claim 16
Dependent Claim
126 words
A non-synchronous step-up voltage mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode, said switching regulator comprising: a switch circuit having a duty cycle; a pulse-width modulator (PWM) circuit having a PWM generator, an independent fixed minimum non-zero duty cycle generator, an input and an output, said PWM circuit output coupled to said switch circuit, said duty cycle being set by said PWM circuit, said switching regulator entering and exiting burst mode based on signals provided by said PWM circuit; and a feedback circuit coupled between said switching regulator output and said PWM circuit input that provides a feedback signal to said PWM circuit that corresponds to the voltage at said switching regulator output.
Claim 17
Dependent Claim
126 words
A non-synchronous step-up voltage mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode, said switching regulator comprising: a switch circuit having a duty cycle; a pulse-width modulator (PWM) circuit having a PWM generator, an independent fixed minimum non-zero duty cycle generator, an input and an output, said PWM circuit output coupled to said switch circuit, said duty cycle being set by said PWM circuit, said switching regulator entering and exiting burst mode based on signals provided by said PWM circuit; and a feedback circuit coupled between said switching regulator output and said PWM circuit input that provides a feedback signal to said PWM circuit that corresponds to the voltage at said switching regulator output.
Claim 18
Dependent Claim
71 words
The switching regulator defined in claim 14 wherein said switch circuit comprises: an inductor having a first end and a second end, said first end coupled to said switching regulator input; a switching element coupled between said second end of said inductor and ground; a diode coupled between said second end of said inductor and said switching regulator output; and an output capacitor coupled between said switching regulator output and ground.
Claim 19
Dependent Claim
122 words
The switching regulator defined in claim 14 wherein said PWM generator comprises a first input coupled to said feedback circuit, a second input, and an output, said fixed minimum non-zero duty cycle generator comprises an input and an output, and said PWM circuit further comprising: a master clock having a first output coupled to said second input of said PWM generator, a second output coupled to said fixed minimum non-zero duty cycle generator input, and a third output; a logic circuit having a first input coupled to said PWM generator output, a second input coupled to said fixed minimum non-zero duty cycle generator output, a third input coupled to said master clock third output, and an output coupled to said switch circuit.
Claim 20
Dependent Claim
112 words
The switching regulator defined in claim 16 wherein said logic circuit comprises: a burst flip-flop having a D-input coupled to said PWM generator output, a clock input coupled to said third clock output and a Q-output; an OR gate having a first input coupled to said PWM generator output, a second input coupled to said fixed minimum non-zero duty cycle generator output, and an output; and an AND gate having a first input coupled to said OR gate output, a second input coupled to said Q-output of said burst flip-flop, and an output coupled to said switch circuit such that said AND gate sets said first duty cycle for said switch circuit.
Claim 21
Dependent Claim
43 words
The switching regulator defined in claim 14 wherein said feedback circuit comprises a feedback amplifier having a positive terminal coupled to a reference voltage, a negative terminal coupled to said switching regulator output, and an output terminal coupled to said PWM circuit input.
Claim 22
Dependent Claim
443 words
A synchronous step-up voltage mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode, said switching regulator comprising: an inductor having a first end and a second end, said first end connected to said switching regulator input; a first power switch, having a first duty cycle, said first power switch coupled between said second end of said inductor and ground; a second power switch, having a first end coupled to said second end of said inductor and a second end coupled to said switching regulator output, said second power switch having a second duty cycle, a comparator having a positive terminal coupled to said switching regulator output, a negative terminal coupled to said second end of said inductor, and an output; a rising edge detector having an input connected to said comparator output terminal and an output; a latch flip-flop having an R-input, an S-input and a Q-output, said S-input coupled to said rising edge detector output, said R-input coupled to said PWM circuit output; and a NOR gate having a first input coupled to said Q-output of said latch flip-flop, a second input and an output connected to said second power switch such that said NOR gate provides second duty cycle for said second power switch; a capacitor coupled between said switching regulator output and ground; a feedback amplifier having a positive terminal coupled to a reference voltage, a negative terminal coupled to said switching regulator output, and an output terminal; a PWM generator having a first input coupled to said output terminal of said feedback amplifier, a second input, and an output; a fixed minimum non-zero duty cycle generator having an input and an output; a burst flip-flop having a D-input coupled to said PWM generator output, a clock input and a Q-output; a master clock having a first output coupled to said second input of said PWM generator, a second output coupled to said fixed minimum non-zero duty cycle generator input, and a third output coupled to said clock input of said burst flip-flop; an OR gate having a first input coupled to said PWM generator output, a second input coupled to said fixed minimum non-zero duty cycle generator output, and an output; and an AND gate having a first input coupled to said OR gate output, a second input coupled to said Q-output of said burst flip-flop, and an output coupled to said R-input of said latch flip-flop and coupled to said second input of said NOR gate, and connected to said first power switch such that said AND gate sets said duty cycle for said switch circuit.
Claim 23
Dependent Claim
443 words
A synchronous step-up voltage mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode, said switching regulator comprising: an inductor having a first end and a second end, said first end connected to said switching regulator input; a first power switch, having a first duty cycle, said first power switch coupled between said second end of said inductor and ground; a second power switch, having a first end coupled to said second end of said inductor and a second end coupled to said switching regulator output, said second power switch having a second duty cycle, a comparator having a positive terminal coupled to said switching regulator output, a negative terminal coupled to said second end of said inductor, and an output; a rising edge detector having an input connected to said comparator output terminal and an output; a latch flip-flop having an R-input, an S-input and a Q-output, said S-input coupled to said rising edge detector output, said R-input coupled to said PWM circuit output; and a NOR gate having a first input coupled to said Q-output of said latch flip-flop, a second input and an output connected to said second power switch such that said NOR gate provides second duty cycle for said second power switch; a capacitor coupled between said switching regulator output and ground; a feedback amplifier having a positive terminal coupled to a reference voltage, a negative terminal coupled to said switching regulator output, and an output terminal; a PWM generator having a first input coupled to said output terminal of said feedback amplifier, a second input, and an output; a fixed minimum non-zero duty cycle generator having an input and an output; a burst flip-flop having a D-input coupled to said PWM generator output, a clock input and a Q-output; a master clock having a first output coupled to said second input of said PWM generator, a second output coupled to said fixed minimum non-zero duty cycle generator input, and a third output coupled to said clock input of said burst flip-flop; an OR gate having a first input coupled to said PWM generator output, a second input coupled to said fixed minimum non-zero duty cycle generator output, and an output; and an AND gate having a first input coupled to said OR gate output, a second input coupled to said Q-output of said burst flip-flop, and an output coupled to said R-input of said latch flip-flop and coupled to said second input of said NOR gate, and connected to said first power switch such that said AND gate sets said duty cycle for said switch circuit.
Claim 24
Dependent Claim
185 words
A non-synchronous voltage-mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode, said switching regulator comprising: a switch circuit having a duty cycle; a pulse-width modulator (PWM) circuit having a PWM generator, an independent fixed minimum non-zero duty cycle generator, an input and an output, said PWM circuit output coupled to said switch circuit, said duty cycle being set by said PWM circuit, said switching regulator entering and exiting burst mode based on signals provided by said PWM circuit; and a feedback circuit coupled between said switching regulator output and said PWM generator input that provides a feedback signal to said PWM circuit that is derived from the voltage at said switching regulator output, wherein said feedback signal is for setting said duty cycle, and, at light load conditions, said independent duty cycle generator provides a minimum signal to said PWM circuit, maintaining said duty cycle at a level higher than that set by said feedback circuit, until said feedback sets a zero duty cycle, at which point said switching regulator enters burst mode.
Claim 25
Dependent Claim
185 words
A non-synchronous voltage-mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode, said switching regulator comprising: a switch circuit having a duty cycle; a pulse-width modulator (PWM) circuit having a PWM generator, an independent fixed minimum non-zero duty cycle generator, an input and an output, said PWM circuit output coupled to said switch circuit, said duty cycle being set by said PWM circuit, said switching regulator entering and exiting burst mode based on signals provided by said PWM circuit; and a feedback circuit coupled between said switching regulator output and said PWM generator input that provides a feedback signal to said PWM circuit that is derived from the voltage at said switching regulator output, wherein said feedback signal is for setting said duty cycle, and, at light load conditions, said independent duty cycle generator provides a minimum signal to said PWM circuit, maintaining said duty cycle at a level higher than that set by said feedback circuit, until said feedback sets a zero duty cycle, at which point said switching regulator enters burst mode.
Claim 26
Dependent Claim
222 words
A synchronous voltage-mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode comprising: a switch circuit having a first duty cycle and a second duty cycle, said second duty cycle substantially out-of-phase with said first duty cycle; a pulse-width modulator (PWM) circuit having a PWM generator, an independent fixed minimum non-zero duty cycle generator, an input and an output, said PWM circuit output coupled to said switch circuit, said first duty cycle being set by said PWM circuit and said second duty cycle being partially set by said PWM circuit, said switching regulator entering and exiting burst mode based on signals provided by said PWM circuit; and a feedback circuit coupled between said switching regulator output and said PWM circuit input that provides a feedback signal to said PWM circuit that is derived from the voltage at said switching regulator output, wherein said feedback signal is for setting said first duty cycle, and for partially setting said second duty cycle, and, at light load conditions, said independent duty cycle generator provides a minimum signal to said PWM circuit maintaining said first duty cycle at a level higher than that set by said feedback circuit, until said feedback sets a zero duty cycle, at which point said switching regulator enters burst mode.
Claim 27
Dependent Claim
222 words
A synchronous voltage-mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode comprising: a switch circuit having a first duty cycle and a second duty cycle, said second duty cycle substantially out-of-phase with said first duty cycle; a pulse-width modulator (PWM) circuit having a PWM generator, an independent fixed minimum non-zero duty cycle generator, an input and an output, said PWM circuit output coupled to said switch circuit, said first duty cycle being set by said PWM circuit and said second duty cycle being partially set by said PWM circuit, said switching regulator entering and exiting burst mode based on signals provided by said PWM circuit; and a feedback circuit coupled between said switching regulator output and said PWM circuit input that provides a feedback signal to said PWM circuit that is derived from the voltage at said switching regulator output, wherein said feedback signal is for setting said first duty cycle, and for partially setting said second duty cycle, and, at light load conditions, said independent duty cycle generator provides a minimum signal to said PWM circuit maintaining said first duty cycle at a level higher than that set by said feedback circuit, until said feedback sets a zero duty cycle, at which point said switching regulator enters burst mode.
Claim 28
Dependent Claim
186 words
A non-synchronous step-up voltage mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode, said switching regulator comprising: a switch circuit having a duty cycle; a pulse-width modulator (PWM) circuit having a PWM generator, an independent fixed minimum non-zero duty cycle generator, an input and an output, said PWM circuit output coupled to said switch circuit, said duty cycle being set by said PWM circuit, said switching regulator entering and exiting burst mode based on signals provided by said PWM circuit; and a feedback circuit coupled between said switching regulator output and said PWM circuit input that provides a feedback signal to said PWM circuit that corresponds to the voltage at said switching regulator output, wherein said feedback signal is for setting said duty cycle, and, at light load conditions, said independent duty cycle generator provides a minimum signal to said PWM circuit, maintaining said duty cycle at a level higher than that set by said feedback circuit, until said feedback sets a zero duty cycle, at which point said switching regulator enters burst mode.
Claim 29
Dependent Claim
186 words
A non-synchronous step-up voltage mode switching regulator having an input and an output, said switching regulator being capable of automatically entering and exiting burst mode, said switching regulator comprising: a switch circuit having a duty cycle; a pulse-width modulator (PWM) circuit having a PWM generator, an independent fixed minimum non-zero duty cycle generator, an input and an output, said PWM circuit output coupled to said switch circuit, said duty cycle being set by said PWM circuit, said switching regulator entering and exiting burst mode based on signals provided by said PWM circuit; and a feedback circuit coupled between said switching regulator output and said PWM circuit input that provides a feedback signal to said PWM circuit that corresponds to the voltage at said switching regulator output, wherein said feedback signal is for setting said duty cycle, and, at light load conditions, said independent duty cycle generator provides a minimum signal to said PWM circuit, maintaining said duty cycle at a level higher than that set by said feedback circuit, until said feedback sets a zero duty cycle, at which point said switching regulator enters burst mode.
References Cited (Backward Citations)
US3458798A
Cited
US3585491A
Cited
US3571697A
Cited
US3581186A
Cited
US3579091A
Cited
US3582758A
Cited
US3772588A
Cited
US3733540A
Cited
US3784893A
Cited
US3992638A
Cited
US3863128A
Cited
US3879647A
Cited
US4013939A
Cited
US4035710A
Cited
US4071884A
Cited
US4160288A
Cited
US4326245A
Cited
US4462069A
Cited
US4395675A
Cited
US4428015A
Cited
JPS5911459A
Cited
US4479174A
Cited
US4610521A
Cited
US4493017A
Cited
US4542041A
Cited
US4554499A
Cited
JPS6032565A
Cited
US4541041A
Cited
US4519024A
Cited
JPS60156269A
Cited
US4578630A
Cited
US4716514A
Cited
US4634956A
Cited
US4706177A
Cited
US4712169A
Cited
US4674020A
Cited
US4672518A
Cited
US4672303A
Cited
US4727308A
Cited
US4683529A
Cited
US4823070A
Cited
US4709315A
Cited
US4801859A
Cited
US4754385A
Cited
US4819122A
Cited
US4928200A
Cited
JPS63307510A
Cited
US4929882A
Cited
US4813066A
Cited
US4814684A
Cited
US4843532A
Cited
JPH02146080A
Cited
US4870555A
Cited
US4866587A
Cited
US4922404A
Cited
US5034871A
Cited
US4884183A
Cited
US4902957A
Cited
US4931716A
Cited
US5128603A
Cited
US5028861A
Cited
US5184129A
Cited
JPH03113986A
Cited
US5066900A
Cited
EP0428377A2
Cited
US4996638A
Cited
JPH0442771A
Cited
US5144547A
Cited
US5138249A
Cited
JPH0449844A
Cited
US5193211A
Cited
JPH04101286A
Cited
JPH04128086A
Cited
US5170333A
Cited
US5081411A
Cited
US5134355A
Cited
US5068575A
Cited
JP3113986B2
Cited
US5237606A
Cited
US5097196A
Cited
US5309078A
Cited
US5177676A
Cited
US5179511A
Cited
US5548189A
Cited
US5408162A
Cited
US5469349A
Cited
US5396412A
Cited
US5481178A
Cited
US5528483A
Cited
US5568044A
Cited
US5627460A
Cited
US5747976A
Cited
US5804950A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-10-22 | 2005-04-23 | 2005-10-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-10-22 | 2009-04-23 | 2009-10-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-10-22 | 2013-04-23 | 2013-10-23 | $7700.00 | Window Closed / Lapsed |