US6285536B1
Expired / Lapsed
US
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High voltage input pad system
Assignee: Cirrus Logic Inc
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Filing: 1999-11-03
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Granted: 2001-09-04
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Expires: 2019-11-03
Abstract
Abstract A high voltage input pad and method for accepting electrostatic discharge (ESD) surges without damage to an input semiconductor amplifier. The protection system includes a metal gate, transistor, and n-well resistors which provide ESD protection. Protection is further provided against large voltages coupled to an amplifier by connecting an input bipolar junction transistor to the negative input connection of the amplifier. Negative surges are directed to ground with an anode grounded diode connected at its cathode to the negative input connection of the amplifier.
Inventors
- 👤 Douglas R. Holberg
- 👤 Nadi R. Itani
- 👤 David R. Welland
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 17:06
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
286 words
A circuit for protecting against electrostatic discharge while allowing high input analog voltage during normal operation, said circuit comprising: a first circuit portion including: a first diode having an anode and a cathode, said anode being coupled to a ground, a first n-well resistor having one end coupled to an input for said first circuit portion and another end coupled to the cathode of said first diode, a second n-well resistor having one end coupled to an output for said first circuit portion and another end coupled to the cathode of said diode, and a metal gate transistor (MGT) having a metal gate, a source coupled to ground, and a drain, the metal gate, and the drain being coupled to the cathode of said diode; and a second circuit portion, having an input coupled to the output of the first circuit portion, said second circuit portion including: a first diode having an anode coupled to around and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages, a bipolar function transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting Positive electrostatic discharge voltages, a first transistor including source, drain, and gate, said drain and gate being coupled to each other, to the base of the bipolar junction transistor and to a second input of the second circuit portion, and a second transistor connected in series with said first transistor, said second transistor including source, drain and gate, and said gate and drain of said second transistor being coupled to each other, and the source of said first transistor being coupled to the drain of said second transistor.
Claim 2
Dependent Claim
286 words
A circuit for protecting against electrostatic discharge while allowing high input analog voltage during normal operation, said circuit comprising: a first circuit portion including: a first diode having an anode and a cathode, said anode being coupled to a ground, a first n-well resistor having one end coupled to an input for said first circuit portion and another end coupled to the cathode of said first diode, a second n-well resistor having one end coupled to an output for said first circuit portion and another end coupled to the cathode of said diode, and a metal gate transistor (MGT) having a metal gate, a source coupled to ground, and a drain, the metal gate, and the drain being coupled to the cathode of said diode; and a second circuit portion, having an input coupled to the output of the first circuit portion, said second circuit portion including: a first diode having an anode coupled to around and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages, a bipolar function transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting Positive electrostatic discharge voltages, a first transistor including source, drain, and gate, said drain and gate being coupled to each other, to the base of the bipolar junction transistor and to a second input of the second circuit portion, and a second transistor connected in series with said first transistor, said second transistor including source, drain and gate, and said gate and drain of said second transistor being coupled to each other, and the source of said first transistor being coupled to the drain of said second transistor.
Claim 3
Dependent Claim
44 words
The circuit according to claim 1 , wherein the first circuit portion further comprises: a second diode having an anode and a cathode, the anode of said second diode coupled to ground and the cathode of said second diode coupled to said first resistor.
Claim 4
Dependent Claim
44 words
The circuit according to claim 1 , wherein the first circuit portion further comprises: a second diode having an anode and a cathode, the anode of said second diode coupled to ground and the cathode of said second diode coupled to said second resistor.
Claim 5
Dependent Claim
17 words
The circuit according to claim 1 , wherein said first resistor is coupled to an input pad.
Claim 6
Dependent Claim
271 words
A circuit for protecting against electrostatic discharge while allowing high input analog voltage during normal operation, said circuit comprising: a first circuit portion including: an n-well resistor having first and second resistor connections, said first resistor connection being coupled to an input of the first circuit portion and said second resistor connection being coupled to an output of the first circuit portion, a first diode having an anode and a cathode, the anode coupled to ground and the cathode coupled to said first resistor connection, and a second diode having an anode and a cathode, said anode coupled to ground and the cathode coupled to said second resistor connection; and a second circuit portion, having an input coupled to the output of the first circuit portion, said second circuit portion including: a first diode having an anode coupled to ground and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages, a bipolar junction transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting positive electrostatic discharge voltages, a first transistor including source, drain, and gate, and said drain and gate being coupled to each other, to the base of the bipolar junction transistor and to a second input of the second circuit portion, and a second transistor connected in series with said first transistor, said second transistor including source, drain and gate, and said gate and drain of said second transistor being coupled to each other, and the source of said first transistor being coupled to the drain of said second transistor.
Claim 7
Dependent Claim
271 words
A circuit for protecting against electrostatic discharge while allowing high input analog voltage during normal operation, said circuit comprising: a first circuit portion including: an n-well resistor having first and second resistor connections, said first resistor connection being coupled to an input of the first circuit portion and said second resistor connection being coupled to an output of the first circuit portion, a first diode having an anode and a cathode, the anode coupled to ground and the cathode coupled to said first resistor connection, and a second diode having an anode and a cathode, said anode coupled to ground and the cathode coupled to said second resistor connection; and a second circuit portion, having an input coupled to the output of the first circuit portion, said second circuit portion including: a first diode having an anode coupled to ground and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages, a bipolar junction transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting positive electrostatic discharge voltages, a first transistor including source, drain, and gate, and said drain and gate being coupled to each other, to the base of the bipolar junction transistor and to a second input of the second circuit portion, and a second transistor connected in series with said first transistor, said second transistor including source, drain and gate, and said gate and drain of said second transistor being coupled to each other, and the source of said first transistor being coupled to the drain of said second transistor.
Claim 8
Dependent Claim
215 words
A circuit for protecting against electrostatic discharge while allowing high input analog voltage during normal operation, said circuit comprising: a first circuit portion including: a metal gate transistor (MGT) having a metal gate, a source coupled to ground, and a drain, a first resistor having one end coupled to an input connection for said first circuit portion and another end coupled to the drain and gate of the MGT, and a second resistor having one end coupled to an output connection for said first circuit portion and another end coupled to a cathode of a first diode; and a second circuit portion, having an input coupled to the output of the first circuit portion, said second circuit portion including: a first diode having an anode coupled to ground and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages, a bipolar junction transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting positive electrostatic discharge voltages, and a second transistor including source, drain, and gate, said gate and drain of said second transistor being coupled to each other and to the base of the bipolar junction transistor, the source of the second transistor being coupled to ground.
Claim 9
Dependent Claim
215 words
A circuit for protecting against electrostatic discharge while allowing high input analog voltage during normal operation, said circuit comprising: a first circuit portion including: a metal gate transistor (MGT) having a metal gate, a source coupled to ground, and a drain, a first resistor having one end coupled to an input connection for said first circuit portion and another end coupled to the drain and gate of the MGT, and a second resistor having one end coupled to an output connection for said first circuit portion and another end coupled to a cathode of a first diode; and a second circuit portion, having an input coupled to the output of the first circuit portion, said second circuit portion including: a first diode having an anode coupled to ground and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages, a bipolar junction transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting positive electrostatic discharge voltages, and a second transistor including source, drain, and gate, said gate and drain of said second transistor being coupled to each other and to the base of the bipolar junction transistor, the source of the second transistor being coupled to ground.
Claim 10
Dependent Claim
79 words
The circuit according to claim 6 , wherein the first circuit portion further comprises: a second diode having an anode and a cathode, the anode of said second diode coupled to ground and the cathode of said second diode coupled to the gate of the MGT; and a third diode having an anode and a cathode, the anode of said third diode coupled to ground and the cathode of said third diode coupled to the gate of the MGT.
Claim 11
Dependent Claim
188 words
An electrostatic discharge protection circuit (EDPC) including: a first circuit portion including: a resistor coupled to an input pad, a first distributed diode having a cathode coupled to the resistor and having an anode coupled to ground and a metal gate transistor (MGT) having a drain and a gate, both the drain and gate coupled to the cathode of said first distributed diode; and a second circuit portion, having an input coupled to an output of the first circuit portion, said second circuit portion including: a capacitor coupled to said drain of said MGT and connectable to an external circuit to be protected; a first diode having an anode coupled to around and a cathode coupled to the capacitor, for shunting negative electrostatic discharge voltages, a bipolar junction transistor, having a collector coupled to the capacitor and an emitter coupled to ground, for shunting positive electrostatic discharge voltages, a second transistor including source, drain, and gate, said gate and drain of said second transistor being coupled to each other and to the base of the bipolar junction transistor, the source of the second transistor being coupled to ground.
Claim 12
Dependent Claim
188 words
An electrostatic discharge protection circuit (EDPC) including: a first circuit portion including: a resistor coupled to an input pad, a first distributed diode having a cathode coupled to the resistor and having an anode coupled to ground and a metal gate transistor (MGT) having a drain and a gate, both the drain and gate coupled to the cathode of said first distributed diode; and a second circuit portion, having an input coupled to an output of the first circuit portion, said second circuit portion including: a capacitor coupled to said drain of said MGT and connectable to an external circuit to be protected; a first diode having an anode coupled to around and a cathode coupled to the capacitor, for shunting negative electrostatic discharge voltages, a bipolar junction transistor, having a collector coupled to the capacitor and an emitter coupled to ground, for shunting positive electrostatic discharge voltages, a second transistor including source, drain, and gate, said gate and drain of said second transistor being coupled to each other and to the base of the bipolar junction transistor, the source of the second transistor being coupled to ground.
Claim 13
Dependent Claim
19 words
The EDPC circuit of claim 8 wherein said MGT comprises a plurality of metal gate transistors connected in parallel.
Claim 14
Dependent Claim
33 words
The EDPC circuit of claim 8 wherein said first circuit portion further comprises: a second distributed diode having an anode and a cathode, said anode of said second distributed diode coupled to ground.
Claim 15
Dependent Claim
20 words
The EDPC circuit of claim 10 , wherein the cathode of said second distributed diode is coupled to said capacitor.
Claim 16
Dependent Claim
14 words
The EDPC circuit of claim 8 , wherein said capacitor is a metal capacitor.
Claim 17
Dependent Claim
170 words
A protection circuit including: a first circuit portion including: an input pad connected to a source of analog signals; a first distributed n-well resistance coupled to said input pad; a metal gate transistor (MGT) having a gate and a drain coupled to said resistance at a portion spaced apart from said input pad; and a second circuit portion, having an input coupled to an output of the first circuit portion, said second circuit portion including: a first diode having an anode coupled to ground and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages, a bipolar junction transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting positive electrostatic discharge voltages, a second transistor including source, drain, and gate, said gate and drain of said second transistor being coupled to each other and to the base of the bipolar junction transistor, the source of the second transistor being coupled to ground.
Claim 18
Dependent Claim
170 words
A protection circuit including: a first circuit portion including: an input pad connected to a source of analog signals; a first distributed n-well resistance coupled to said input pad; a metal gate transistor (MGT) having a gate and a drain coupled to said resistance at a portion spaced apart from said input pad; and a second circuit portion, having an input coupled to an output of the first circuit portion, said second circuit portion including: a first diode having an anode coupled to ground and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages, a bipolar junction transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting positive electrostatic discharge voltages, a second transistor including source, drain, and gate, said gate and drain of said second transistor being coupled to each other and to the base of the bipolar junction transistor, the source of the second transistor being coupled to ground.
Claim 19
Dependent Claim
47 words
The protection circuit of claim 13 , wherein said first circuit portion further comprises: a distributed diode having an anode and a cathode, the anode of said distributed diode being coupled to ground and the cathode of said distributed diode coupled to said first distributed n-well resistance.
Claim 20
Dependent Claim
23 words
The protection circuit of claim 14 , wherein said first circuit portion further comprises: a second distributed n-well resistance coupled to said MGT.
Claim 21
Dependent Claim
19 words
The protection circuit of claim 15 , wherein said distributed diode is coupled to said second distributed n-well resistance.
Claim 22
Dependent Claim
25 words
The protection circuit of claim 13 , wherein said second circuit portion further comprises: a capacitor coupled in series with said first distributed n-well resistance.
Claim 23
Dependent Claim
222 words
A charge coupled device (CCD) system, comprising: a CCD device for providing an analog voltage output signal; a first protection circuit portion comprising: a pad, a resistor having a first terminal coupled to said pad, and a metal gate transistor (MGT) having a drain and a gate, both coupled to a second terminal of said resistor; a second protection circuit portion, having an input coupled to an output of the first protection circuit portion, said second protection circuit portion including: a capacitor coupled to said first protection circuit portion, and an amplifier coupled to said capacitor for amplifying signals provided to said capacitor; and signal processing circuitry coupled to said amplifier for processing signals amplified by said amplifier; wherein said second protection circuit portion further includes: a first diode having an anode coupled to ground and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages, a bipolar junction transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting positive electrostatic discharge voltages, and a second transistor including source, drain, and gate, said gate and drain of said second transistor being coupled to each other and to the base of said bipolar junction transistor, the source of the second transistor being coupled to ground.
Claim 24
Dependent Claim
222 words
A charge coupled device (CCD) system, comprising: a CCD device for providing an analog voltage output signal; a first protection circuit portion comprising: a pad, a resistor having a first terminal coupled to said pad, and a metal gate transistor (MGT) having a drain and a gate, both coupled to a second terminal of said resistor; a second protection circuit portion, having an input coupled to an output of the first protection circuit portion, said second protection circuit portion including: a capacitor coupled to said first protection circuit portion, and an amplifier coupled to said capacitor for amplifying signals provided to said capacitor; and signal processing circuitry coupled to said amplifier for processing signals amplified by said amplifier; wherein said second protection circuit portion further includes: a first diode having an anode coupled to ground and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages, a bipolar junction transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting positive electrostatic discharge voltages, and a second transistor including source, drain, and gate, said gate and drain of said second transistor being coupled to each other and to the base of said bipolar junction transistor, the source of the second transistor being coupled to ground.
Claim 25
Dependent Claim
140 words
A circuit for protecting against electrostatic discharge while allowing high input analog voltage during normal operation, the circuit having first and second inputs, said circuit comprising: a first transistor having a gate, a drain, and a source, the gate and drain of the first transistor coupled to the second input of the circuit; a second transistor having a gate, a drain, and a source, the gate and drain of the second transistor coupled to the source of the first transistor and the source of the second transistor coupled to ground; a bipolar junction transistor having a base, a collector, and an emitter, the base of the bipolar junction transistor coupled to the drain for the first transistor, the emitter of the bipolar junction transistor coupled to ground and the collector of the bipolar junction transistor coupled to the first input.
Claim 26
Dependent Claim
140 words
A circuit for protecting against electrostatic discharge while allowing high input analog voltage during normal operation, the circuit having first and second inputs, said circuit comprising: a first transistor having a gate, a drain, and a source, the gate and drain of the first transistor coupled to the second input of the circuit; a second transistor having a gate, a drain, and a source, the gate and drain of the second transistor coupled to the source of the first transistor and the source of the second transistor coupled to ground; a bipolar junction transistor having a base, a collector, and an emitter, the base of the bipolar junction transistor coupled to the drain for the first transistor, the emitter of the bipolar junction transistor coupled to ground and the collector of the bipolar junction transistor coupled to the first input.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-09-03 | 2005-03-05 | 2005-09-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-09-03 | 2009-03-05 | 2009-09-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-09-03 | 2013-03-05 | 2013-09-04 | $7700.00 | Window Closed / Lapsed |