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Patent US6281054B1 successfully refreshed from Google Patents.
US6281054B1
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US
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SOI device and method for fabricating the same
Assignee: SK Hynix Inc
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Filing: 2000-11-16
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Granted: 2001-08-28
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Expires: 2020-11-16
Abstract
Abstract A SOI device, comprising: a SOI wafer having a stack structure of a silicon substrate, a buried oxide layer having a first and a second contact holes and a silicon layer; an isolation layer formed in the silicon layer to define a device formation region; a transistor including a gate formed over the device formation region of the silicon layer defined by the isolation layer, source and drain regions formed at the both side of the gate in the device formation region, and a channel region which is a portion of the device formation region between the source and drain region; a conduction layer being contacted with the buried oxide layer; an impurity region for well pick-up formed in the silicon layer to be contacted with the buried oxide layer; a first contact layer formed within the first contact hole of the buried oxide layer to electrically connect the channel region of the transistor and the conduction layer; and a second contact layer formed with the second contact hole of the buried oxide layer to electrically connect the impurity region for well pick-up and the conduction layer.
Inventors
- 👤 In Seok Yeo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 19:43
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6708; H10D30/6711; H10D30/674; H10D30/6757
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
162 words
A method for fabricating a silicon on insulator (SOI) device, comprising the steps of: preparing a silicon substrate; forming a conduction layer in the substrate; forming a buried oxide layer having a first and a second contact holes over the silicon substrate including a conduction layer; forming a first and a second contact layers within the first and the second contact holes of the buried oxide layer, respectively to contact with the conduction layer; forming a silicon layer over the buried oxide layer including the first and the second contact layers; forming an isolation layer in the silicon layer to define a device formation region; forming a gate on the device formation region of the silicon layer over the first contact layer; forming a source region and a drain region at the both side of the gate in the device formation region; and forming an impurity region for well pick-up in the silicon layer to be contacted with the second contact layer.
Claim 2
Independent Claim
162 words
A method for fabricating a silicon on insulator (SOI) device, comprising the steps of: preparing a silicon substrate; forming a conduction layer in the substrate; forming a buried oxide layer having a first and a second contact holes over the silicon substrate including a conduction layer; forming a first and a second contact layers within the first and the second contact holes of the buried oxide layer, respectively to contact with the conduction layer; forming a silicon layer over the buried oxide layer including the first and the second contact layers; forming an isolation layer in the silicon layer to define a device formation region; forming a gate on the device formation region of the silicon layer over the first contact layer; forming a source region and a drain region at the both side of the gate in the device formation region; and forming an impurity region for well pick-up in the silicon layer to be contacted with the second contact layer.
Claim 3
Dependent Claim
36 words
The method as claimed in claim 1 , wherein the conduction layer is formed in a surface of the silicon substrate by ion implanting any ones of boron ions or phosphorus ions in the silicon substrate.
Claim 4
Dependent Claim
23 words
The method as claimed in claim 2 , wherein a dose of the implanted ion is 1×10 14 −1×10 16 ions/cm 2 .
Claim 5
Dependent Claim
18 words
The method as claimed in claim 1 , wherein the conduction layer is comprised of a polysilicon pattern.
Claim 6
Dependent Claim
37 words
The method as claimed in claim 4 , after the conduction layer formation step, further comprising the steps of; depositing a planarization layer over the silicon substrate; and flowing the planarization layer to expose the polysilicon pattern.
Claim 7
Dependent Claim
25 words
The method as claimed in claim 1 , wherein the buried oxide layer is formed by any one of thermal oxidation or chemical vapor deposition.
Claim 8
Dependent Claim
30 words
The method as claimed in claim 1 , wherein the first and second contact layers are comprised of doped single crystal silicon or doped polysilicon formed by selective epitaxial growth.
Claim 9
Dependent Claim
25 words
The method as claimed in claim 1 , wherein the impurity region for well pick-up is formed in the silicon layer of a peripheral region.
Claim 10
Dependent Claim
23 words
The method as claimed in claim 1 , wherein the impurity region for well pick-up has an opposite conductivity to the source region.
References Cited (Backward Citations)
US6118152A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-08-27 | 2005-02-26 | 2005-08-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-08-27 | 2009-02-26 | 2009-08-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-08-27 | 2013-02-26 | 2013-08-28 | $7700.00 | Window Closed / Lapsed |