US6252906B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Decimation of a high definition video signal
Assignee: Thomson Licensing SAS
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Filing: 1998-07-31
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Granted: 2001-06-26
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Expires: 2018-07-31
Abstract
Abstract A video processor receives coded digital image data which is decoded into MPEG compatible pixel blocks. The pixel blocks are horizontally and vertically decimated to produce a reduced size image suitable for picture-in-picture, picture-on-picture, or picture-in-graphics display. Decoded input data to the decimation network is alias filtered and decimated at a factor of 8 to 3. Decimated output pixel data is derived solely from a respectively associated decoded input pixel block.
Inventors
- 👤 Barth Alan Canfield
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 06:37
CPC Classifications
G; G06; G06T; G06T3/00; G06T3/40; G06T3/4023; H; H04; H04N; H04N19/00; H04N19/50; H04N19/59; H04N21/00; H04N21/40; H04N21/41; H04N21/426; H04N21/43; H04N21/431; H04N21/4312; H04N21/4316; H04N5/00; H04N5/44; H04N5/445; H04N5/45; H04N7/00; H04N7/015
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
81 words
A block based video processor comprising: a source of spatial domain sampled video signal; blocking circuitry responsive to said sampled video signal for forming N×M blocks of pixel values representing said sampled video signal, where N and M are integers less than 17; subsampling circuitry responsive to blocks of pixel values for providing a lesser number of pixel values for respective blocks; wherein each one of said pixel values of said lesser number is derived solely from its associated input block.
Claim 2
Dependent Claim
81 words
A block based video processor comprising: a source of spatial domain sampled video signal; blocking circuitry responsive to said sampled video signal for forming N×M blocks of pixel values representing said sampled video signal, where N and M are integers less than 17; subsampling circuitry responsive to blocks of pixel values for providing a lesser number of pixel values for respective blocks; wherein each one of said pixel values of said lesser number is derived solely from its associated input block.
Claim 3
Dependent Claim
25 words
The processor of claim 1 , further comprising: a memory between said decoder and said subsampling circuitry for storing a pixel block to be subsampled.
Claim 4
Dependent Claim
29 words
The processor of claim 1 , further comprising: a frame memory coupled to said decoder; wherein said decoder is MPEG compatible and said blocks of pixel data are macroblocks.
Claim 5
Dependent Claim
22 words
The processor of claim 1 , wherein: said subsampling circuitry comprises a macroblock memory, an alias reduction filter and a pixel subsampler.
Claim 6
Dependent Claim
21 words
The processor of claim 4 , wherein: said alias filter is one of a polyphase filter and a finite response filter.
Claim 7
Dependent Claim
18 words
The processor of claim 1 , wherein: said subsampling circuitry has a subsampling factor of 8 to 3.
Claim 8
Independent Claim
99 words
A method for processing a data stream of coded image representative data, comprising the steps: decoding said data steam to produce a decoded data stream representing pixel values in the spatial domain; and subsampling said data stream representing pixel values in the spatial domain to produce a reduced data stream; wherein said decoded data stream is comprised of pixel blocks of N×M pixel values, N and M integers less than 17; said subsampling step produces pixel values lesser in number per block; and each one of said subsampled pixel values is derived solely from its associated input pixel block.
Claim 9
Independent Claim
99 words
A method for processing a data stream of coded image representative data, comprising the steps: decoding said data steam to produce a decoded data stream representing pixel values in the spatial domain; and subsampling said data stream representing pixel values in the spatial domain to produce a reduced data stream; wherein said decoded data stream is comprised of pixel blocks of N×M pixel values, N and M integers less than 17; said subsampling step produces pixel values lesser in number per block; and each one of said subsampled pixel values is derived solely from its associated input pixel block.
Claim 10
Independent Claim
109 words
A method for processing a data stream of coded image representative data, comprising the steps: decoding said data steam to produce a decoded data stream representing pixel values; and subsampling said data stream to produce a reduced data stream; wherein said decoded data stream is comprised of pixel blocks; said subsampling step produces pixel values lesser in number per block; and each one of said subsampled pixel values is derived solely from its associated input pixel block; formatting said reduced data stream to produce reduced resolution image data suitable for display; and combining said reduced resolution image data with image frame data representing a background image suitable for display.
Claim 11
Independent Claim
109 words
A method for processing a data stream of coded image representative data, comprising the steps: decoding said data steam to produce a decoded data stream representing pixel values; and subsampling said data stream to produce a reduced data stream; wherein said decoded data stream is comprised of pixel blocks; said subsampling step produces pixel values lesser in number per block; and each one of said subsampled pixel values is derived solely from its associated input pixel block; formatting said reduced data stream to produce reduced resolution image data suitable for display; and combining said reduced resolution image data with image frame data representing a background image suitable for display.
Claim 12
Dependent Claim
21 words
The method of claim 8 , wherein: said data stream is MPEG compatible and said blocks of pixel data are macroblocks.
Claim 13
Dependent Claim
20 words
The method of claim 8 , wherein: said subsampling step includes the steps of alias reduction filtering and pixel subsampling.
Claim 14
Dependent Claim
18 words
The method of claim 8 , wherein: said subsampling step has a subsampling factor of 8 to 3.
Claim 15
Dependent Claim
100 words
In a digital video signal processing system, apparatus comprising: an input network for receiving a digital data stream containing coded image representative information; a decoder for decoding said digital data stream to provide blocks of pixel data; a buffer for receiving a block of pixel data; a subsampling circuitry for subsampling said buffered block of pixel data to produce reduced resolution image data; and a display processor for combining said reduced resolution image data with image frame data representing a background image; wherein each subsampled pixel value from said subsampling circuitry is derived solely from its associated input pixel block.
Claim 16
Dependent Claim
100 words
In a digital video signal processing system, apparatus comprising: an input network for receiving a digital data stream containing coded image representative information; a decoder for decoding said digital data stream to provide blocks of pixel data; a buffer for receiving a block of pixel data; a subsampling circuitry for subsampling said buffered block of pixel data to produce reduced resolution image data; and a display processor for combining said reduced resolution image data with image frame data representing a background image; wherein each subsampled pixel value from said subsampling circuitry is derived solely from its associated input pixel block.
Claim 17
Dependent Claim
23 words
The system of claim 12 , further comprising: a memory for storing said blocks of pixel data and said reduced resolution image data.
Claim 18
Dependent Claim
15 words
The system of claim 12 , wherein: said subsampling circuitry vertically subsamples said data stream.
Claim 19
Dependent Claim
15 words
The system of claim 12 , wherein: said subsampling circuitry horizontally subsamples said data stream.
Claim 20
Dependent Claim
19 words
The system of claim 12 , wherein: said subsampling circuitry comprises an alias reduction filter and a subsampling circuitry.
Claim 21
Dependent Claim
40 words
The system of claim 12 , wherein: said decoder is MPEG compatible capable of decoding a high definition video signal, and includes a motion compensation network; said memory is a frame memory; and said blocks of pixel data are macroblocks.
Claim 22
Dependent Claim
36 words
The system of claim 12 , wherein: said reduced resolution image data comprises a frame suitable for use with said background image for producing one of a picture-in-picture display, a picture-on-picture display, and a picture-in-graphics display.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-06-25 | 2004-12-25 | 2005-06-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-06-25 | 2008-12-25 | 2009-06-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-06-25 | 2012-12-25 | 2013-06-26 | $7700.00 | Window Closed / Lapsed |