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US6235542B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Ferroelectric memory device and method for fabricating the same

Assignee: SK Hynix Inc
•
Filing: 1999-07-01
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Granted: 2001-05-22
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Expires: 2019-07-01
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Abstract

Abstract A method for fabricating a ferroelectric memory device, comprising the steps of: providing a semiconductor substrate where a transistor having an impurity region is formed; forming a conduction layer for storage node over the substrate; forming a ferroelectric film on the conduction layer; patterning the conduction layer and the ferroelectric film to form a storage node and a dielectric film; forming a protection film for dielectric film over the semiconductor substrate to cover the storage node and the dielectric film; patterning the protection film to expose a selected portion of the dielectric film; and forming a plate node on the dielectric film.

Inventors

  • 👤 Yong Sik Yu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 02:12
CPC Classifications
H; H10; H10B; H10B53/00; H10D; H10D84/00; H10D84/01; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10B53/30; H10D1/00; H10D1/60; H10D1/68; H10D1/682; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/0698

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 143 words
A method for fabricating a ferroelectric memory device, comprising the steps of: providing a semiconductor substrate where a transistor having an impurity region is formed; forming a conduction layer for a storage node over the substrate; furnace-annealing the conduction layer; forming a first ferroelectric film on the conduction layer; rapid-thermally annealing the first ferroelectric film; forming a second ferroelectric film on the first ferroelectric film; rapid-thermally annealing the second film on the first ferroelectric film; furnace-annealing the first and second ferroelectric films; patterning the conduction layer and the ferroelectric films to form a storage node and a dielectric film; forming a protection film for protecting the dielectric film over the semiconductor substrate to cover the storage node and the dielectric film; patterning the protection film to expose a selected portion of the dielectric film; and forming a plate node on the dielectric film.
Claim 2
Independent Claim 143 words
A method for fabricating a ferroelectric memory device, comprising the steps of: providing a semiconductor substrate where a transistor having an impurity region is formed; forming a conduction layer for a storage node over the substrate; furnace-annealing the conduction layer; forming a first ferroelectric film on the conduction layer; rapid-thermally annealing the first ferroelectric film; forming a second ferroelectric film on the first ferroelectric film; rapid-thermally annealing the second film on the first ferroelectric film; furnace-annealing the first and second ferroelectric films; patterning the conduction layer and the ferroelectric films to form a storage node and a dielectric film; forming a protection film for protecting the dielectric film over the semiconductor substrate to cover the storage node and the dielectric film; patterning the protection film to expose a selected portion of the dielectric film; and forming a plate node on the dielectric film.
Claim 3
Dependent Claim 27 words
The method as claimed in claim 1 , further comprising the step of forming a glue layer over the semiconductor substrate before formation of the conduction layer.
Claim 4
Dependent Claim 24 words
The method as claimed in claim 2 , wherein the glue layer is comprised of one of a Ti layer or a Ta layer.
Claim 5
Dependent Claim 22 words
The method as claimed in claim 2 , wherein the glue layer is formed at a thickness of 100 to 1000 Å.
Claim 6
Dependent Claim 22 words
The method as claimed in claim 1 , wherein the conduction layer for the storage node is comprised of a Pt layer.
Claim 7
Dependent Claim 25 words
The method as claimed in claim 5 , the conduction layer for the storage node is formed at a thickness of 1000 to 5000 Å.
Claim 8
Dependent Claim 60 words
The method as claimed in claim 1 , wherein the furnace-annealing of the conduction layer is carried out at a temperature of 500 to 700° C. during 10 to 60 minutes at ambient of oxygen and the furnace-annealing of the first and second ferroelectric films is at 700 to 800° C. during 10 to 60 minutes at ambient of oxygen.
Claim 9
Dependent Claim 17 words
The method as claimed in claim 1 , wherein the ferroelectric films are formed with spin coating.
Claim 10
Dependent Claim 18 words
The method as claimed in claim 1 , wherein the ferroelectric films are comprised of SrBi2Ta2O9 (SBT) film.
Claim 11
Dependent Claim 75 words
The method as claimed in claim 9 , wherein the formation step of the SBT films includes the steps of: forming a first SBT film over the conduction layer for storage node; drying the first SBT film; rapid-thermally annealing the dried first SBT film; drying the second SBT film; rapid-thermally annealing the dried second SBT film; and, furnace-annealing the first and second SBT films after the rapid-thermally annealing step of the dried second SBT film.
Claim 12
Dependent Claim 40 words
The method as claimed in claim 10 , wherein the furnace annealing step for the first and second SBT films is carried out at a temperature of 700 to 800° C. during 10 to 60 minutes at ambient of oxygen.
Claim 13
Dependent Claim 48 words
The method as claimed in claim 10 , wherein the first and second SBT films are first dried at a temperature of 160 to 180° C. during 1 to 5 minutes and then second dried at a temperature of 260 to 280° C. during 1 to 5 minutes.
Claim 14
Dependent Claim 33 words
The method as claimed in claim 10 , wherein the rapid-thermally annealing step is carried out at a temperature of 600 to 800° C. during 10 to 60 seconds at ambient of oxygen.
Claim 15
Dependent Claim 26 words
The method as claimed in claim 10 , wherein the first and second SBT films are formed at a thickness of 800 to 1200 Å, respectively.
Claim 16
Dependent Claim 19 words
The method as claimed in claim 1 , wherein the protection film for dielectric film is comprised of SrTiO3.
Claim 17
Dependent Claim 26 words
The method as claimed in claim 15 , wherein the protection film is deposited at a temperature of 300 to 550° C. with chemical vapor deposition.
Claim 18
Dependent Claim 22 words
The method as claimed in claim 15 , wherein the protection film is deposited at a thickness of 500 to 2000 Å.
Claim 19
Dependent Claim 18 words
The method as claimed in claim 1 , where the plate node is comprised of a Pt layer.
Claim 20
Dependent Claim 72 words
The method as claimed in claim 1 , further comprising the steps of forming an intermediating insulating layer over the protection film and the plate node; etching the intermediating layer to expose the impurity region of the transistor and the plate node, thereby forming contact holes; and forming a metal interconnection layer over the intermediate insulating layer to be contacted with the impurity region and the plate node through the contact holes.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-05-21 2004-11-20 2005-05-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-05-21 2008-11-20 2009-05-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-05-21 2012-11-20 2013-05-22 $7700.00 Window Closed / Lapsed

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