Patent JPS422883Y1 successfully refreshed from Google Patents.
Patent US6223274B1 successfully refreshed from Google Patents.
← Back to Patent Explorer
US6223274B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Power-and speed-efficient data storage/transfer architecture models and design methodologies for programmable or reusable multi-media processors

Assignee: Imec
•
Filing: 1998-11-19
•
Granted: 2001-04-24
•
Expires: 2018-11-19
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A programmable processing engine and a method of operating the same is described, the processing engine including a customized processor, a flexible processor and a data store commonly sharable between the two processors. The customized processor normally executes a sequence of a plurality of pre-customized routines, usually for which it has been optimized. To provide some flexibility for design changes and optimizations, a controller for monitoring the customized processor during execution of routines is provided to select one of a set of pre-customized processing interruption points and for switching context from the customized processor to the flexible processor at the interruption point. The customized processor can then be switched off and the flexible processor carries out a modified routine. By using sharable a data store, the context switch can be chosen at a time when all relevant data is in the sharable data store. This means that the flexible processor can pick up the modified processing cleanly. After the modified processing the flexible processor writes back new data into the data store and the customized processor can continue processing either where it left off or may skip a certain number of cycles as instructed by the flexible processor, before beginning processing of the new data.

Inventors

  • 👤 Francky Catthoor
  • 👤 Miguel Miranda
  • 👤 Stefan Janssens
  • 👤 Hugo De Man

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 09:42
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3877; G06F9/3879; G06F12/00; G06F12/02; G06F12/08; G06F12/0802; G06F12/0844; G06F12/0846; G06F12/0893; G06F12/0897; Y; Y02; Y02D; Y02D10/00

Claims Analysis

Total Claims: 33
Claim 1
Independent Claim 87 words
A programmable processing engine, the processing engine including a customized processor, a flexible processor and a data store commonly sharable between the two processors, the customized processor normally executing a sequence of a plurality of pre-customized routines the programmable processing engine, comprising: a controller for monitoring the customized processor during execution of a first code portion to select one of a set of pre-customized processing interruption points in a first routine and for switching context from the customized processor to the flexible processor at the interruption point.
Claim 2
Dependent Claim 87 words
A programmable processing engine, the processing engine including a customized processor, a flexible processor and a data store commonly sharable between the two processors, the customized processor normally executing a sequence of a plurality of pre-customized routines the programmable processing engine, comprising: a controller for monitoring the customized processor during execution of a first code portion to select one of a set of pre-customized processing interruption points in a first routine and for switching context from the customized processor to the flexible processor at the interruption point.
Claim 3
Dependent Claim 25 words
The processing engine of claim 1 , wherein the data store is at least a part of the local data storage of the customized processor.
Claim 4
Dependent Claim 24 words
The processing engine of claim 1 , wherein the data store is data storage shared commonly by both the customized and the programmable processor.
Claim 5
Dependent Claim 17 words
The processing engine of claim 1 , wherein the customized processor is a custom address calculation unit.
Claim 6
Dependent Claim 18 words
The processing engine of claim 1 , wherein the programmable processor is an application specific instruction set processor.
Claim 7
Dependent Claim 16 words
The processing engine of claim 1 , wherein the customized processor is a memory management unit.
Claim 8
Dependent Claim 23 words
The processing engine of claim 1 , wherein the programmable processor includes a counter means for determining the timing of the context switch.
Claim 9
Dependent Claim 28 words
The processing engine of claim 1 , wherein the customized processor is adapted supply information to the programmable processor sufficient to determine the timing of the context switch.
Claim 10
Dependent Claim 22 words
The processing engine of claim 8 , wherein the programmable processor is adapted to monitor the branch evolution in the customized processor.
Claim 11
Dependent Claim 39 words
The processing engine of claim 8 , wherein the programmable processor has a register and the customized processor is adapted to transmit information relating to the status of routines running on the custom processor for storage in said registers.
Claim 12
Dependent Claim 26 words
The processing engine of claim 1 , wherein the flexible processor comprises a hierarchy of cache memories, the cache memories being flexibly configurable at run time.
Claim 13
Dependent Claim 26 words
The processing engine of claim 11 , wherein the flexibly configurable cache memories include flexible bypasses over a selectable combination of cache levels of the hierarchy.
Claim 14
Dependent Claim 36 words
The processing engine of claim 11 , wherein the flexibly configurable cache memories include means for allowing signals to reside in a selectable one of the cache levels of the hierarchy for more than one cycle.
Claim 15
Dependent Claim 43 words
The processing engine of claim 11 , wherein the flexibly configurable cache memories include means for allowing different cache levels of the cache memory hierarchy to be merged in a single memory such that the size of each cache level is selectable therefrom.
Claim 16
Dependent Claim 33 words
The processing engine of claim 11 , wherein the flexibly configurable cache memories include means for dividing the cache into banks and means for selectably combining the banks into selectably accessible cache partitions.
Claim 17
Dependent Claim 27 words
The processing engine of claim 11 , wherein the flexibly configurable cache memories include means for allowing selection of the degree of associativity for any cache level.
Claim 18
Dependent Claim 24 words
The processing engine of claim 1 , wherein access of the flexible processor to the sharable data store is provide by a switching network.
Claim 19
Dependent Claim 46 words
The processing engine of claim 17 , wherein the switching network is adapted so that it only provides access to the data store at the context switch and outside the context switch the flexible and/or the customized processor is not loaded capacitively by the access connections.
Claim 20
Independent Claim 85 words
A method of operating a programmable processing engine, the processing engine including a customized processor, a flexible processor and a data store commonly sharable between the two processors, the customized processor normally executing a sequence of a plurality of pre-customized routines the method, comprising: monitoring the customized processor during execution of a first code portion to select one of a set of pre-customized processing interruption points in the first routine; and switching context from the customized processor to the flexible processor at the interruption point.
Claim 21
Independent Claim 85 words
A method of operating a programmable processing engine, the processing engine including a customized processor, a flexible processor and a data store commonly sharable between the two processors, the customized processor normally executing a sequence of a plurality of pre-customized routines the method, comprising: monitoring the customized processor during execution of a first code portion to select one of a set of pre-customized processing interruption points in the first routine; and switching context from the customized processor to the flexible processor at the interruption point.
Claim 22
Dependent Claim 41 words
The method of claim 19 , additionally comprising: executing a second code portion on said flexible processor using at least part of first data left in the data store by the execution of the first code portion on the customized processor.
Claim 23
Dependent Claim 59 words
The method according to claim 20 , additionally comprising: completing the execution of the second code portion on the flexible processor such that second data is left in the data store; and switching context to the customized processor and continuing processing of a third code portion on the customized processor using at least a part of the second data.
Claim 24
Dependent Claim 32 words
The method of claim 21 , wherein the flexible processor instructs the customized processor to skip a certain number of processing steps before the customized processor begins processing of the second data.
Claim 25
Dependent Claim 21 words
The method of claim 19 , wherein the customized processor is powered down after the context switch to the flexible processor.
Claim 26
Dependent Claim 24 words
The method of claim 19 , wherein the data store is at least a portion of the local data storage of the customized processor.
Claim 27
Dependent Claim 23 words
The method of claim 19 , wherein the data store is data storage shared commonly by both the customized and the programmable processor.
Claim 28
Dependent Claim 48 words
A customized processor comprising a controller for monitoring the execution of a process running on the customized processor and being adapted to select one of a set of pre-customized processing interruption points in the process and for halting the customized processor at any one of the interruption points.
Claim 29
Dependent Claim 48 words
A customized processor comprising a controller for monitoring the execution of a process running on the customized processor and being adapted to select one of a set of pre-customized processing interruption points in the process and for halting the customized processor at any one of the interruption points.
Claim 30
Dependent Claim 17 words
The customized processor of claim 26 , wherein the customized processor is a custom address calculation unit.
Claim 31
Dependent Claim 16 words
The customized processor of claim 26 , wherein the customized processor is a memory management unit.
Claim 32
Dependent Claim 25 words
The customized processor of claim 26 , wherein the customized processor is adapted to output information sufficient to determine the timing of the context switch.
Claim 33
Dependent Claim 30 words
The customised processor according to claim 26 , additionally comprising at least one switch for selectably allowing access to a part of the data storage local to the customized processor.

References Cited (Backward Citations)

US5784611A Cited
US6009507A Cited
US5959689A Cited
US6141675A Cited
US5732275A Cited
US6061711A Cited
US5974454A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-04-23 2004-10-23 2005-04-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-04-23 2008-10-23 2009-04-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-04-23 2012-10-23 2013-04-24 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag