US6198301B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for determining the hot carrier lifetime of a transistor
Assignee: Nokia of America Corp
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Filing: 1998-07-23
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Granted: 2001-03-06
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Expires: 2018-07-23
Abstract
Abstract The present invention provides a method for determining a hot carrier lifetime of a transistor. In one embodiment, the method comprises the steps of determining an initial transconductance (gm1) of a transistor, and then, applying a stress voltage, which does not exceed a maximum breakdown voltage of the transistor, to the transistor to cause a transconductance degradation of the transistor, and then determining a subsequent transconductance (gm2) of the transistor. A hot carrier lifetime of the transistor can then be determined as a function of gm1 and gm2. Thus, the present invention provides a method in which the hot carrier lifetime is determined from sequential transconductance measurements without intervening, transistor characteristic tests that are typically conducted between the transconductance measurements that degrade the sensitivity of the gm measurement. The present invention provides a method that allows for an accurate determination of the hot carrier lifetime within a very short period of time, and therefore, can be used to monitor the hot carrier lifetime quality of the devices as they are fabricated without substantial increases in production downtime typically required to make hot carrier lifetime measurements.
Inventors
- 👤 Sundar Chetlur
- 👤 Merlyne M. De Souza
- 👤 Anthony S. Oates
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 13:41
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/26; G01R31/27; G01R31/275; G01R31/2607; G01R31/2621; G01R31/28; G01R31/2851; G01R31/2855; G01R31/286; G01R31/2868; G01R31/287; H; H10; H10P; H10P74/00; H10P74/20; H10P74/207
Claims Analysis
Total Claims: 41
Claim 1
Independent Claim
80 words
A method for determining a hot carrier lifetime of a transistor, comprising: determining an initial transconductance (g m1 ) of a transistor; then applying a stress voltage to said transistor to cause a transconductance degradation of said transistor, said stress voltage not exceeding a maximum breakdown voltage of said transistor; then determining a subsequent transconductance (g m2 ) of said transistor, a hot carrier lifetime of said transistor being a function of said g m1 and said g m2 .
Claim 2
Independent Claim
80 words
A method for determining a hot carrier lifetime of a transistor, comprising: determining an initial transconductance (g m1 ) of a transistor; then applying a stress voltage to said transistor to cause a transconductance degradation of said transistor, said stress voltage not exceeding a maximum breakdown voltage of said transistor; then determining a subsequent transconductance (g m2 ) of said transistor, a hot carrier lifetime of said transistor being a function of said g m1 and said g m2 .
Claim 3
Dependent Claim
20 words
The method as recited in claim 1 wherein said breakdown voltage ranges from about 4.8 volts to about 3.3 volts.
Claim 4
Dependent Claim
42 words
The method as recited in claim 1 wherein determining an initial transconductance (g m1 ) includes determining said g m1 as a function of a first source/drain current within a linear region of said transistor with respect to a first gate voltage.
Claim 5
Dependent Claim
42 words
The method as recited in claim 1 wherein determining a subsequent transconductance (g m2 ) includes determining said g m2 as a function of a second source/drain current within a linear region of said transistor with respect to a second gate voltage.
Claim 6
Dependent Claim
60 words
The method as recited in claim 1 further comprising: again applying said stress voltage to said transistor to cause further degradation of said transistor subsequent to said determining a g m2 ; and determining a transconductance (g m3 ) of said transistor, said stress voltage remaining substantially constant in determining said g m1 , g m2 and g m3 .
Claim 7
Dependent Claim
35 words
The method as recited in claim 1 further comprising applying said stress voltage to said transistor to cause further degradation of said transistor subsequent to determining a subsequent transconductance (g m2 ) of said transistor.
Claim 8
Dependent Claim
22 words
The method as recited in claim 1 wherein said stress voltage does not exceed about a maximum operating voltage of said transistor.
Claim 9
Dependent Claim
21 words
The method as recited in claim 7 wherein said maximum operating voltage ranges from about 3.6 volts to about 3.3 volts.
Claim 10
Dependent Claim
34 words
The method as recited in claim 1 wherein said transconductance degradation saturates during a time interval ranging from about 0.001 seconds to about 100 seconds, said hot carrier lifetime determined from this time interval.
Claim 11
Dependent Claim
34 words
The method as recited in claim 9 wherein said transconductance degradation saturates during a time interval ranging from about 0.001 seconds to about 10 seconds, said hot carrier lifetime determined from this time interval.
Claim 12
Dependent Claim
20 words
The method as recited in claim 9 wherein said transconductance degradation saturates from about 0.001 seconds to about 0.01 seconds.
Claim 13
Dependent Claim
26 words
The method as recited in claim 1 wherein said stress voltage is applied for a time interval ranging from about 0.001 second to about 100 seconds.
Claim 14
Dependent Claim
26 words
The method as recited in claim 12 wherein said stress voltage is applied for a time interval ranging from about 0.001 second to about 10 seconds.
Claim 15
Dependent Claim
26 words
The method as recited in claim 12 wherein said stress voltage is applied for a time interval ranging from about 0.001 seconds to about 0.01 seconds.
Claim 16
Independent Claim
127 words
A method for determining a hot carrier lifetime of a transistor, comprising: determining an initial transconductance (g m1 ) of a transistor, said g m1 being a function of a first source/drain current within a linear region of said transistor with respect to a first gate voltage; then applying a stress voltage to said transistor to cause a transconductance degradation of said transistor, said stress voltage not exceeding a maximum breakdown voltage of said transistor; then determining a subsequent transconductance (g m2 ) of said transistor, said g m2 being a function of a second source/drain current within said linear region with respect to a second gate voltage, a hot carrier lifetime of said transistor being a function of said g m1 and said g m2 .
Claim 17
Independent Claim
127 words
A method for determining a hot carrier lifetime of a transistor, comprising: determining an initial transconductance (g m1 ) of a transistor, said g m1 being a function of a first source/drain current within a linear region of said transistor with respect to a first gate voltage; then applying a stress voltage to said transistor to cause a transconductance degradation of said transistor, said stress voltage not exceeding a maximum breakdown voltage of said transistor; then determining a subsequent transconductance (g m2 ) of said transistor, said g m2 being a function of a second source/drain current within said linear region with respect to a second gate voltage, a hot carrier lifetime of said transistor being a function of said g m1 and said g m2 .
Claim 18
Dependent Claim
21 words
The method as recited in claim 15 wherein said maximum breakdown voltage ranges from about 9.6 volts to about 5.5 volts.
Claim 19
Dependent Claim
30 words
The method as recited in claim 15 further comprising applying said stress voltage to said transistor to cause further degradation of said transistor subsequent to determining said g m2 .
Claim 20
Dependent Claim
23 words
The method as recited in claim 15 wherein said maximum breakdown voltage does not exceed about a maximum operating voltage of said transistor.
Claim 21
Dependent Claim
39 words
The method as recited in claim 15 wherein said maximum operating voltage ranges from about 3.6 volts to about 3.3 volts for a 3 volt technology and from about 5 volts to 5.5 volts for a 5 volt technology.
Claim 22
Dependent Claim
34 words
The method as recited in claim 15 wherein said transconductance degradation saturates during a time interval ranging from about 0.001 seconds and about 100 seconds, said hot carrier lifetime determined from this time interval.
Claim 23
Dependent Claim
34 words
The method as recited in claim 20 wherein said transconductance degradation saturates during a time interval ranging from about 0.001 seconds and about 10 seconds, said hot carrier lifetime determined from this time interval.
Claim 24
Dependent Claim
20 words
The method as recited in claim 20 wherein said transconductance degradation saturates between about 0.001 seconds and about 0.01 seconds.
Claim 25
Dependent Claim
44 words
The method as recited in claim 15 further comprising: again applying said stress voltage to said transistor to cause further degradation of said transistor subsequent to said step of determining said g m2 ; and determining a transconductance (g m3 ) of said transistor.
Claim 26
Dependent Claim
26 words
The method as recited in claim 15 wherein said stress voltage is applied for a time interval ranging from about 0.001 second to about 100 seconds.
Claim 27
Dependent Claim
26 words
The method as recited in claim 24 wherein said stress voltage is applied for a time interval ranging from about 0.001 second to about 10 seconds.
Claim 28
Dependent Claim
26 words
The method as recited in claim 24 wherein said stress voltage is applied for a time interval ranging from about 0.001 seconds to about 0.01 seconds.
Claim 29
Dependent Claim
20 words
The method as recited in claim 15 wherein said first drain/source current is substantially equal to said second drain/source current.
Claim 30
Independent Claim
124 words
A method of fabricating a semiconductor device having transistors formed thereon, comprising: providing a semiconductor wafer substrate; forming a transistor on said semiconductor substrate; determining an initial transconductance (g m1 ) of said transistor; then applying a stress voltage to said transistor to cause a transconductance degradation of said transistor, said stress voltage not exceeding a maximum breakdown voltage of said transistor; then determining a subsequent transconductance (g m2 ) of said transistor, a hot carrier lifetime of said transistor being a function of said g m1 and said g m2 ; and rejecting said transistor when said hot carrier lifetime falls outside of desired transistor design parameters or accepting said transistor when said hot carrier lifetime falls within said desired transistor design parameters.
Claim 31
Independent Claim
124 words
A method of fabricating a semiconductor device having transistors formed thereon, comprising: providing a semiconductor wafer substrate; forming a transistor on said semiconductor substrate; determining an initial transconductance (g m1 ) of said transistor; then applying a stress voltage to said transistor to cause a transconductance degradation of said transistor, said stress voltage not exceeding a maximum breakdown voltage of said transistor; then determining a subsequent transconductance (g m2 ) of said transistor, a hot carrier lifetime of said transistor being a function of said g m1 and said g m2 ; and rejecting said transistor when said hot carrier lifetime falls outside of desired transistor design parameters or accepting said transistor when said hot carrier lifetime falls within said desired transistor design parameters.
Claim 32
Dependent Claim
26 words
The method as recited in claim 28 wherein said stress voltage is applied for a time interval ranging from about 0.001 seconds to about 0.01 seconds.
Claim 33
Dependent Claim
20 words
The method as recited in claim 28 wherein said breakdown voltage ranges from about 4.8 volts to about 3.3 volts.
Claim 34
Dependent Claim
42 words
The method as recited in claim 28 wherein determining an initial transconductance (g m1 ) includes determining said g m1 as a function of a first source/drain current within a linear region of said transistor with respect to a first gate voltage.
Claim 35
Dependent Claim
42 words
The method as recited in claim 28 wherein determining a subsequent transconductance (g m2 ) includes determining said g m2 as a function of a second source/drain current within a linear region of said transistor with respect to a second gate voltage.
Claim 36
Dependent Claim
60 words
The method as recited in claim 28 further comprising: again applying said stress voltage to said transistor to cause further degradation of said transistor subsequent to said determining a g m2 ; and determining a transconductance (g m3 ) of said transistor, said stress voltage remaining substantially constant in determining said g m1 , g m2 and g m3 .
Claim 37
Dependent Claim
35 words
The method as recited in claim 28 further comprising applying said stress voltage to said transistor to cause further degradation of said transistor subsequent to determining a subsequent transconductance (g m2 ) of said transistor.
Claim 38
Dependent Claim
22 words
The method as recited in claim 28 wherein said stress voltage does not exceed about a maximum operating voltage of said transistor.
Claim 39
Dependent Claim
21 words
The method as recited in claim 35 wherein said maximum operating voltage ranges from about 3.6 volts to about 3.3 volts.
Claim 40
Dependent Claim
34 words
The method as recited in claim 28 wherein said transconductance degradation saturates during a time interval ranging from about 0.001 seconds to about 100 seconds, said hot carrier lifetime determined from this time interval.
Claim 41
Dependent Claim
34 words
The method as recited in claim 37 wherein said transconductance degradation saturates during a time interval ranging from about 0.001 seconds to about 10 seconds, said hot carrier lifetime determined from this time interval.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2004-03-05 | 2004-09-04 | 2005-03-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-03-05 | 2008-09-04 | 2009-03-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-03-05 | 2012-09-04 | 2013-03-06 | $7700.00 | Window Closed / Lapsed |