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Parallel processing of data matrices

Assignee: Rambus Inc
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Filing: 1998-02-19
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Granted: 2001-01-09
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Expires: 2018-02-19
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Abstract

Abstract A method of controlling first and second processing elements which have associated respective first and second address memories, and associated respective first and second data memories, the method comprising storing first and second pluralities of address entries in the first and second address memories respectively, exchanging a pre-determined number of address entries between the first and second address memories, retrieving data entries from a common data store on the basis of the address entries held in the first address memory, storing the retrieved data entries in the first data memory, and exchanging the pre-determined number of data entries between the first and second data memories, such that the first data memory includes data entries corresponding to the address entries stored in the first address memory, and such that the second data memory includes data entries corresponding to the address entries stored in the second address memory.

Inventors

  • 👤 John R. Rhoades

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 18:13
CPC Classifications
G; G06; G06T; G06T1/00; G06T1/20

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 151 words
A method of controlling first and second processing elements which have associated respective first and second address memories, and associated respective first and second data memories, the method comprising storing first and second pluralities of address entries in the first and second address memories respectively, exchanging four address entries between the first and second address memories, retrieving eight data entries from a common data store on the basis of the address entries held in the first address memory, the data entries being for interpolation by the processing elements, storing the retrieved data entries in the first data memory, and exchanging four data entries between the first and second data memories, such that the first data memory includes data entries corresponding to the address entries stored in the first address memory, and such that the second data memory includes data entries corresponding to the address entries stored in the second address memory.
Claim 2
Independent Claim 151 words
A method of controlling first and second processing elements which have associated respective first and second address memories, and associated respective first and second data memories, the method comprising storing first and second pluralities of address entries in the first and second address memories respectively, exchanging four address entries between the first and second address memories, retrieving eight data entries from a common data store on the basis of the address entries held in the first address memory, the data entries being for interpolation by the processing elements, storing the retrieved data entries in the first data memory, and exchanging four data entries between the first and second data memories, such that the first data memory includes data entries corresponding to the address entries stored in the first address memory, and such that the second data memory includes data entries corresponding to the address entries stored in the second address memory.
Claim 3
Independent Claim 176 words
A method of controlling first and second processing elements which have associated respective first and second address memories, and associated respective first and second data memories, the method comprising storing first and second pluralities of address entries in the first and second address memories respectively, exchanging a predetermined number of address entries between the first and second address memories, retrieving data entries from a common data store on the basis of the address entries held in the first address memory, storing the retrieved data entries in the first data memory, retrieving data entries from the common data store on the basis of the address entries held in the second address memory and storing them in the second data memory, and then exchanging the predetermined number of data entries between the first and second data memories, such that the first data memory includes data entries corresponding to the address entries stored in the first address memory, and such that the second data memory includes data entries corresponding to the address entries stored in the second address memory.
Claim 4
Independent Claim 176 words
A method of controlling first and second processing elements which have associated respective first and second address memories, and associated respective first and second data memories, the method comprising storing first and second pluralities of address entries in the first and second address memories respectively, exchanging a predetermined number of address entries between the first and second address memories, retrieving data entries from a common data store on the basis of the address entries held in the first address memory, storing the retrieved data entries in the first data memory, retrieving data entries from the common data store on the basis of the address entries held in the second address memory and storing them in the second data memory, and then exchanging the predetermined number of data entries between the first and second data memories, such that the first data memory includes data entries corresponding to the address entries stored in the first address memory, and such that the second data memory includes data entries corresponding to the address entries stored in the second address memory.

References Cited (Backward Citations)

US5584010A Cited
US5539898A Cited
US5481669A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-01-09 2004-07-10 2005-01-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-01-09 2008-07-10 2009-01-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-01-09 2012-07-10 2013-01-09 $7700.00 Window Closed / Lapsed

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