US6159851A
Expired / Lapsed
US
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Borderless vias with CVD barrier layer
Assignee: GlobalFoundries Inc
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Filing: 1999-04-21
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Granted: 2000-12-12
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Expires: 2019-04-21
Abstract
Abstract Borderless vias are filled by initially depositing a thin, conformal layer of titanium nitride by chemical vapor deposition to cover an undercut, etched side surface of a lower metal feature. A metal, such as tungsten, is subsequently deposited to fill the borderless via. Embodiments include thermal decomposition of an organic-titanium compound, such as tetrakis-dimethylamino titanium, and treating the deposited titanium nitride in an H 2 /N 2 plasma to lower its resistivity.
Inventors
- 👤 Robert C. Chen
- 👤 David C. Greenlaw
- 👤 John A. Iacoponi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 21:15
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/052; H10W20/0523; H10W20/033; H10W20/038; H10W20/039; H10W20/056; H10W20/40; H10W20/41; H10W20/42
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
160 words
A method of manufacturing a semiconductor device, which method comprises: forming a first dielectric layer on a substrate; forming a first patterned metal layer having gaps on the first dielectric layer, wherein the first patterned metal layer comprises a first metal feature with an upper surface and side surfaces; forming a second dielectric layer on the first patterned metal layer; etching to: form a through-hole having an internal surface in the second dielectric layer; expose a portion of the upper surface of the first metal feature; and expose, and etch to form an undercut concave portion in, a side surface of the first metal feature; depositing a layer of barrier material by chemical vapor deposition to line the: internal surface of the through-hole; exposed portion of the upper surface of the first metal feature; and undercut concave portion of the first metal feature; and depositing a conductive material in the lined opening filing the through-hole and forming a borderless via.
Claim 2
Independent Claim
160 words
A method of manufacturing a semiconductor device, which method comprises: forming a first dielectric layer on a substrate; forming a first patterned metal layer having gaps on the first dielectric layer, wherein the first patterned metal layer comprises a first metal feature with an upper surface and side surfaces; forming a second dielectric layer on the first patterned metal layer; etching to: form a through-hole having an internal surface in the second dielectric layer; expose a portion of the upper surface of the first metal feature; and expose, and etch to form an undercut concave portion in, a side surface of the first metal feature; depositing a layer of barrier material by chemical vapor deposition to line the: internal surface of the through-hole; exposed portion of the upper surface of the first metal feature; and undercut concave portion of the first metal feature; and depositing a conductive material in the lined opening filing the through-hole and forming a borderless via.
Claim 3
Dependent Claim
13 words
The method according to claim 1, wherein the barrier material is titanium nitride.
Claim 4
Dependent Claim
18 words
The method according to claim 2, comprising depositing titanium nitride by decomposition of an organic compound containing titanium.
Claim 5
Dependent Claim
13 words
The method according to claim 3, wherein the organic compound is tetrakis-dimethylamino titanium.
Claim 6
Dependent Claim
29 words
The method according to claim 3, comprising treating the chemical vapor deposited titanium nitride barrier layer with a hydrogen/nitrogen plasma to reduce its carbon content and lower its resistivity.
Claim 7
Dependent Claim
41 words
The method according to claim 5, wherein the deposited titanium nitride barrier layer is treated with a plasma to reduce its carbon content to less than about 4 to 5% and its resistivity to less than about 250 micro 5 ohm/cm.
Claim 8
Dependent Claim
25 words
The method according to claim 5, wherein the plasma treated titanium nitride barrier layer has a thickness of about 50 Å to about 250 Å.
Claim 9
Dependent Claim
20 words
The method according to claim 3, wherein the titanium nitride barrier layer has a microstructure comprising amorphous and crystalline regions.
Claim 10
Dependent Claim
16 words
The method according to claim 8, wherein the microstructure comprises crystalline region in an amorphous region.
Claim 11
Dependent Claim
64 words
The method according to claim 3, comprising forming the patterned metal layer by: depositing a lower metal layer; depositing an intermediate layer of aluminum or an aluminum alloy; depositing an upper anti-reflective coating; etching to pattern the metal layer forming a plurality of gaps; and filling the gaps with a dielectric material; wherein the undercut concave portion extends under, without including, the anti-reflective coating.
Claim 12
Dependent Claim
22 words
The method according to claim 10, wherein the lower metal layer comprises titanium or tungsten; and the anti-reflective coating comprises titanium-titanium nitride.
Claim 13
Dependent Claim
40 words
The method according to claim 3, comprising forming a second patterned metal layer on the second dielectric layer, wherein the second patterned metal layer comprises a second metal feature electrically connected to the first metal feature through the borderless via.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-12-12 | 2004-06-12 | 2004-12-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-12-12 | 2008-06-12 | 2008-12-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-12-12 | 2012-06-12 | 2012-12-12 | $7700.00 | Window Closed / Lapsed |