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US6150260A Expired / Lapsed US ⏱️ 0.0 years remaining

Sacrificial stop layer and endpoint for metal CMP

Assignee: GlobalFoundries Singapore Pte Ltd
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Filing: 1998-07-06
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Granted: 2000-11-21
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Expires: 2018-07-06
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Abstract

Abstract A new method of metal plug metallization utilizing a sacrificial layer as a CMP stop to protect the oxide layer from damage during CMP is described. Semiconductor device structures are provided in and on a semiconductor substrate. An insulating layer covers the semiconductor device structures. A sacrificial titanium nitride layer is deposited overlying the insulating layer. An opening is etched through the sacrificial layer and the insulating layer to one of the semiconductor device structures. A glue layer is deposited conformally over the surface of the sacrificial layer and within the opening. A barrier layer is deposited overlying the glue layer. A metal layer is deposited overlying the barrier layer. Chemical mechanical polishing is used to polish away the metal layer, barrier layer, and glue layer overlying the insulating layer wherein the sacrificial layer acts as a polish stop and an endpoint detector and protects the insulating layer from the polishing thereby preventing erosion and dishing to complete formation of said metal plug metallization in the fabrication of an integrated circuit.

Inventors

  • 👤 Sudipto Ranendra Roy

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 02:13
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/092; H10P; H10P52/00; H10P52/40; H10P52/403; H10W20/031; H10W20/056; H10W20/058; H10W20/062; Y; Y10; Y10S; Y10S438/00; Y10S438/959

Claims Analysis

Total Claims: 29
Claim 1
Independent Claim 153 words
A method of forming metal plug metallization in the fabrication of integrated circuits comprising: providing semiconductor device structures in and on a semiconductor substrate; providing an insulating layer covering said semiconductor device structures; depositing a sacrificial layer comprising titanium nitride overlying said insulating layer; etching an opening through said sacrificial layer and said insulating layer to one of said semiconductor device structures; depositing a glue layer conformally over the surface of said sacrificial layer and within said opening; depositing a barrier layer overlying said glue layer; depositing a metal layer overlying said barrier metal layer; and polishing away said metal layer, said barrier layer, and said glue layer overlying said insulating layer wherein said sacrificial layer acts as a polish stop and an endpoint detector and wherein said sacrificial layer protects said insulating layer from said polishing to complete said formation of said metal plug metallization in said fabrication of said integrated circuit.
Claim 2
Independent Claim 153 words
A method of forming metal plug metallization in the fabrication of integrated circuits comprising: providing semiconductor device structures in and on a semiconductor substrate; providing an insulating layer covering said semiconductor device structures; depositing a sacrificial layer comprising titanium nitride overlying said insulating layer; etching an opening through said sacrificial layer and said insulating layer to one of said semiconductor device structures; depositing a glue layer conformally over the surface of said sacrificial layer and within said opening; depositing a barrier layer overlying said glue layer; depositing a metal layer overlying said barrier metal layer; and polishing away said metal layer, said barrier layer, and said glue layer overlying said insulating layer wherein said sacrificial layer acts as a polish stop and an endpoint detector and wherein said sacrificial layer protects said insulating layer from said polishing to complete said formation of said metal plug metallization in said fabrication of said integrated circuit.
Claim 3
Dependent Claim 39 words
The method according to claim 1 wherein said semiconductor device structures include gate electrodes and source and drain regions and wherein said one of said semiconductor device structure to be contacted is one of said source and drain regions.
Claim 4
Dependent Claim 37 words
The method according to claim 1 wherein said semiconductor device structures include gate electrodes and source and drain regions and wherein said one of said semiconductor device structure to be contacted is one of said gate electrodes.
Claim 5
Dependent Claim 41 words
The method according to claim 1 wherein said semiconductor device structures include gate electrodes and source and drain regions and overlying metal lines and wherein said one of said semiconductor device structure to be contacted is one of said metal lines.
Claim 6
Dependent Claim 13 words
The method according to claim 1 wherein said insulating layer comprises silicon oxide.
Claim 7
Dependent Claim 21 words
The method according to claim 1 wherein said titanium nitride layer has a thickness of between about 200 and 2500 Angstroms.
Claim 8
Dependent Claim 22 words
The method according to claim 1 wherein said glue layer comprises titanium having a thickness of between about 200 and 1000 Angstroms.
Claim 9
Dependent Claim 23 words
The method according to claim 1 wherein said barrier layer comprises titanium nitride having a thickness of between about 200 and 1000 Angstroms.
Claim 10
Dependent Claim 12 words
The method according to claim 1 wherein said metal layer comprises tungsten.
Claim 11
Dependent Claim 12 words
The method according to claim 1 wherein said metal layer comprises aluminum.
Claim 12
Dependent Claim 16 words
The method according to claim 1 wherein said sacrificial layer is partially removed during said polishing.
Claim 13
Dependent Claim 16 words
The method according to claim 1 wherein said sacrificial layer is completely removed during said polishing.
Claim 14
Dependent Claim 13 words
The method according to claim 1 wherein said polishing comprises chemical mechanical polishing.
Claim 15
Dependent Claim 14 words
The method according to claim 1 wherein said sacrificial layer prevents erosion and dishing.
Claim 16
Independent Claim 170 words
A method of forming tungsten plug metallization in the fabrication of integrated circuits comprising: providing semiconductor device structures in and on a semiconductor substrate; providing an insulating layer covering said semiconductor device structures; depositing a sacrificial layer comprising titanium nitride overlying said insulating layer; etching an opening through said sacrificial layer and said insulating layer to one of said semiconductor device structures; depositing a titanium layer conformally over the surface of said sacrificial layer and within said opening; depositing a titanium nitride barrier layer overlying said titanium layer; depositing a tungsten layer overlying said titanium nitride barrier layer; and polishing away said tungsten layer, said titanium nitride barrier layer, and said titanium layer overlying said insulating layer wherein said sacrificial layer acts as a polish stop and an endpoint detector, wherein said sacrificial layer is completely removed, and wherein said sacrificial layer protects said insulating layer from said polishing and prevents erosion and dishing to complete said formation of said tungsten plug metallization in said fabrication of said integrated circuit.
Claim 17
Independent Claim 170 words
A method of forming tungsten plug metallization in the fabrication of integrated circuits comprising: providing semiconductor device structures in and on a semiconductor substrate; providing an insulating layer covering said semiconductor device structures; depositing a sacrificial layer comprising titanium nitride overlying said insulating layer; etching an opening through said sacrificial layer and said insulating layer to one of said semiconductor device structures; depositing a titanium layer conformally over the surface of said sacrificial layer and within said opening; depositing a titanium nitride barrier layer overlying said titanium layer; depositing a tungsten layer overlying said titanium nitride barrier layer; and polishing away said tungsten layer, said titanium nitride barrier layer, and said titanium layer overlying said insulating layer wherein said sacrificial layer acts as a polish stop and an endpoint detector, wherein said sacrificial layer is completely removed, and wherein said sacrificial layer protects said insulating layer from said polishing and prevents erosion and dishing to complete said formation of said tungsten plug metallization in said fabrication of said integrated circuit.
Claim 18
Dependent Claim 39 words
The method according to claim 15 wherein said semiconductor device structures include gate electrodes and source and drain regions and wherein said one of said semiconductor device structure to be contacted is one of said source and drain regions.
Claim 19
Dependent Claim 37 words
The method according to claim 15 wherein said semiconductor device structures include gate electrodes and source and drain regions and wherein said one of said semiconductor device structure to be contacted is one of said gate electrodes.
Claim 20
Dependent Claim 41 words
The method according to claim 15 wherein said semiconductor device structures include gate electrodes and source and drain regions and overlying metal lines and wherein said one of said semiconductor device structure to be contacted is one of said metal lines.
Claim 21
Dependent Claim 20 words
The method according to claim 15 wherein said sacrificial layer has a thickness of between about 200 and 2500 Angstroms.
Claim 22
Dependent Claim 13 words
The method according to claim 15 wherein said polishing comprises chemical mechanical polishing.
Claim 23
Independent Claim 177 words
A method of forming tungsten plug metallization in the fabrication of integrated circuits comprising: providing semiconductor device structures in and on a semiconductor substrate; providing an insulating layer covering said semiconductor device structures; depositing a titanium nitride sacrificial layer overlying said insulating layer; etching an opening through said titanium nitride sacrificial layer and said insulating layer to one of said semiconductor device structures; depositing a titanium layer conformally over the surface of said titanium nitride sacrificial layer and within said opening; depositing a titanium nitride barrier layer overlying said titanium layer; depositing a tungsten layer overlying said titanium nitride barrier layer; and polishing away said tungsten layer, said titanium nitride barrier layer, and said titanium layer overlying said insulating layer wherein said titanium nitride sacrificial layer acts as a polish stop and an endpoint detector, wherein said sacrificial layer is partially removed, and wherein said titanium nitride sacrificial layer protects said insulating layer from said polishing and prevents erosion and dishing to complete said formation of said tungsten plug metallization in said fabrication of said integrated circuit.
Claim 24
Independent Claim 177 words
A method of forming tungsten plug metallization in the fabrication of integrated circuits comprising: providing semiconductor device structures in and on a semiconductor substrate; providing an insulating layer covering said semiconductor device structures; depositing a titanium nitride sacrificial layer overlying said insulating layer; etching an opening through said titanium nitride sacrificial layer and said insulating layer to one of said semiconductor device structures; depositing a titanium layer conformally over the surface of said titanium nitride sacrificial layer and within said opening; depositing a titanium nitride barrier layer overlying said titanium layer; depositing a tungsten layer overlying said titanium nitride barrier layer; and polishing away said tungsten layer, said titanium nitride barrier layer, and said titanium layer overlying said insulating layer wherein said titanium nitride sacrificial layer acts as a polish stop and an endpoint detector, wherein said sacrificial layer is partially removed, and wherein said titanium nitride sacrificial layer protects said insulating layer from said polishing and prevents erosion and dishing to complete said formation of said tungsten plug metallization in said fabrication of said integrated circuit.
Claim 25
Dependent Claim 39 words
The method according to claim 21 wherein said semiconductor device structures include gate electrodes and source and drain regions and wherein said one of said semiconductor device structure to be contacted is one of said source and drain regions.
Claim 26
Dependent Claim 37 words
The method according to claim 21 wherein said semiconductor device structures include gate electrodes and source and drain regions and wherein said one of said semiconductor device structure to be contacted is one of said gate electrodes.
Claim 27
Dependent Claim 41 words
The method according to claim 21 wherein said semiconductor device structures include gate electrodes and source and drain regions and overlying metal lines and wherein said one of said semiconductor device structure to be contacted is one of said metal lines.
Claim 28
Dependent Claim 22 words
The method according to claim 21 wherein said titanium nitride sacrificial layer has a thickness of between about 200 and 2500 Angstroms.
Claim 29
Dependent Claim 13 words
The method according to claim 21 wherein said polishing comprises chemical mechanical polishing.

References Cited (Backward Citations)

US5502008A Cited
US5364817A Cited
US5595937A Cited
US5674781A Cited
US5953635A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-11-21 2004-05-22 2004-11-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-11-21 2008-05-22 2008-11-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-11-21 2012-05-22 2012-11-21 $7700.00 Window Closed / Lapsed

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