Method of forming asymmetrically doped source/drain regions

Claim 1

A method of manufacturing a semiconductor device containing a transistor with asymmetrically doped source/drain regions, which method comprises: depositing a gate conductive layer on a semiconductor substrate with a gate insulating layer therebetween; forming a first insulating layer, comprising a first insulating material, on the gate conductive layer; forming a second insulating layer, comprising a second insulating material different from the first insulating material, on the first insulating layer to form a composite stack; etching the composite stack to form a gate electrode stack having side surfaces and an upper surface, thereby exposing the semiconductor substrate adjacent each side surface; implanting impurity atoms into the exposed semiconductor substrate, using the gate stack as a mask, to form LDD or MDD source/drain implants of the transistor having a first impurity concentration; forming a photoresist mask covering a portion of the gate stack upper surface and the drain region leaving the source region and a portion of the gate stack upper surface exposed; and implanting impurity atoms into the source region forming an HDD implant at a second impurity concentration greater than the first impurity concentration.

Claim 2

A method of manufacturing a semiconductor device containing a transistor with asymmetrically doped source/drain regions, which method comprises: depositing a gate conductive layer on a semiconductor substrate with a gate insulating layer therebetween; forming a first insulating layer, comprising a first insulating material, on the gate conductive layer; forming a second insulating layer, comprising a second insulating material different from the first insulating material, on the first insulating layer to form a composite stack; etching the composite stack to form a gate electrode stack having side surfaces and an upper surface, thereby exposing the semiconductor substrate adjacent each side surface; implanting impurity atoms into the exposed semiconductor substrate, using the gate stack as a mask, to form LDD or MDD source/drain implants of the transistor having a first impurity concentration; forming a photoresist mask covering a portion of the gate stack upper surface and the drain region leaving the source region and a portion of the gate stack upper surface exposed; and implanting impurity atoms into the source region forming an HDD implant at a second impurity concentration greater than the first impurity concentration.

Claim 12

A method of manufacturing a semiconductor device containing a transistor having asymmetrically doped source/drain regions, which method comprises, sequentially: forming a gate electrode having an upper surface and first and second side surfaces on a semiconductor substrate with a gate insulating layer therebetween; implanting impurity ions into the semiconductor substrate, using the gate electrode as a mask, to form LDD or MDD source/drain implants having a first impurity concentration; forming a first insulating layer, comprising a first insulating material, on the upper surface and first and second side surfaces of the gate electrode; forming a second insulating layer, comprising an insulating material different from the first insulating material, on the first insulating layer over the upper surface and first and second side surfaces of the gate electrode; forming a sidewall spacer on the second insulating layer over the first side surface of the gate electrode adjacent the drain region, wherein neither the first nor second insulating layer extends laterally from the sidewall spacer on the semiconductor substrate; and implanting impurity atoms into the semiconductor substrate, using the sidewall spacer and the gate electrode with the first and second insulating layers on the upper surface and second side surface of the gate electrode as a mask, to form HDD source/drain implants having an impurity concentration greater than the first impurity concentration.

Claim 13

A method of manufacturing a semiconductor device containing a transistor having asymmetrically doped source/drain regions, which method comprises, sequentially: forming a gate electrode having an upper surface and first and second side surfaces on a semiconductor substrate with a gate insulating layer therebetween; implanting impurity ions into the semiconductor substrate, using the gate electrode as a mask, to form LDD or MDD source/drain implants having a first impurity concentration; forming a first insulating layer, comprising a first insulating material, on the upper surface and first and second side surfaces of the gate electrode; forming a second insulating layer, comprising an insulating material different from the first insulating material, on the first insulating layer over the upper surface and first and second side surfaces of the gate electrode; forming a sidewall spacer on the second insulating layer over the first side surface of the gate electrode adjacent the drain region, wherein neither the first nor second insulating layer extends laterally from the sidewall spacer on the semiconductor substrate; and implanting impurity atoms into the semiconductor substrate, using the sidewall spacer and the gate electrode with the first and second insulating layers on the upper surface and second side surface of the gate electrode as a mask, to form HDD source/drain implants having an impurity concentration greater than the first impurity concentration.