Method of forming asymmetrically doped source/drain regions

Claim 1

A method of manufacturing a semiconductor device containing a transistor having asymmetrically doped source/drain regions, which method comprises, sequentially: forming a gate electrode having side surfaces on a semiconductor substrate with a gate insulating layer therebetween; implanting impurity ions into the semiconductor substrate, using the gate electrode as a mask to form LDD or MDD source/drain implants having a first impurity concentration; depositing a first insulating layer, comprising a silicon oxide, on the gate electrode, including the side surfaces thereof; depositing a second insulating layer, comprising an insulating material different from the first insulating material, on the first insulating layer; etching through a photoresist mask to remove portions of the first and second insulating layers from the semiconductor substrate, leaving portions of the first and second insulating layers on the gate electrode, including the side surfaces thereof; depositing a layer of spacer material; forming a photomask to shield the drain region; etching the layer of spacer material through the photoresist mask leaving the sidewall spacer on the side surface of the gate electrode adjacent the drain region; and implanting impurity atoms into the semiconductor substrate, using the sidewall spacer as a mask, to form HDD source/drain implants having an impurity concentration greater than the first impurity concentration.

Claim 2

A method of manufacturing a semiconductor device containing a transistor having asymmetrically doped source/drain regions, which method comprises, sequentially: forming a gate electrode having side surfaces on a semiconductor substrate with a gate insulating layer therebetween; implanting impurity ions into the semiconductor substrate, using the gate electrode as a mask to form LDD or MDD source/drain implants having a first impurity concentration; depositing a first insulating layer, comprising a silicon oxide, on the gate electrode, including the side surfaces thereof; depositing a second insulating layer, comprising an insulating material different from the first insulating material, on the first insulating layer; etching through a photoresist mask to remove portions of the first and second insulating layers from the semiconductor substrate, leaving portions of the first and second insulating layers on the gate electrode, including the side surfaces thereof; depositing a layer of spacer material; forming a photomask to shield the drain region; etching the layer of spacer material through the photoresist mask leaving the sidewall spacer on the side surface of the gate electrode adjacent the drain region; and implanting impurity atoms into the semiconductor substrate, using the sidewall spacer as a mask, to form HDD source/drain implants having an impurity concentration greater than the first impurity concentration.

Claim 3

A method of manufacturing a semiconductor device containing a transistor having asymmetrically doped source/drain regions, which method comprises: forming a gate electrode having side surfaces on a semiconductor substrate with a gate insulating layer therebetween; implanting impurity ions into the semiconductor substrate, using the gate electrode as a mask, to form LDD or MDD source/drain implants having a first impurity concentration; depositing a first insulating layer, comprising a first insulating material, on the gate electrode, including the side surfaces thereof, and the semiconductor substrate; depositing a second insulating layer, comprising an insulating material different from the first insulating material, on the first insulating layer; etching through a photoresist mask to remove portions of the first and second insulating layers from the semiconductor substrate, leaving portions of the first and second insulating layers on the gate electrode, including the side surfaces thereof; depositing a layer of spacer material; forming a photomask to shield the drain region; and etching the layer of spacer material through the photoresist mask leaving the sidewall spacer on the side surface of the gate electrode adjacent the drain region; and implanting impurity atoms into the semiconductor substrate, using the sidewall spacer as a mask, to form HDD source/drain implants having an impurity concentration greater than the first impurity concentration, wherein the first insulating layer comprises a silicon oxide.

Claim 4

A method of manufacturing a semiconductor device containing a transistor having asymmetrically doped source/drain regions, which method comprises: forming a gate electrode having side surfaces on a semiconductor substrate with a gate insulating layer therebetween; implanting impurity ions into the semiconductor substrate, using the gate electrode as a mask, to form LDD or MDD source/drain implants having a first impurity concentration; depositing a first insulating layer, comprising a first insulating material, on the gate electrode, including the side surfaces thereof, and the semiconductor substrate; depositing a second insulating layer, comprising an insulating material different from the first insulating material, on the first insulating layer; etching through a photoresist mask to remove portions of the first and second insulating layers from the semiconductor substrate, leaving portions of the first and second insulating layers on the gate electrode, including the side surfaces thereof; depositing a layer of spacer material; forming a photomask to shield the drain region; and etching the layer of spacer material through the photoresist mask leaving the sidewall spacer on the side surface of the gate electrode adjacent the drain region; and implanting impurity atoms into the semiconductor substrate, using the sidewall spacer as a mask, to form HDD source/drain implants having an impurity concentration greater than the first impurity concentration, wherein the first insulating layer comprises a silicon oxide.