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US6137185A Expired / Lapsed US ⏱️ 0.0 years remaining

Electrode structure of a wiring substrate of semiconductor device having expanded pitch

Assignee: Hitachi Ltd
•
Filing: 1999-03-09
•
Granted: 2000-10-24
•
Expires: 2019-03-09
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Abstract

Abstract An electrode structure as well as the fabrication method thereof is disclosed which may enable successful pad layout conversion of interconnection electrode pads on the periphery of an associated IC chip to a grid array of rows and columns of terminal solder pads arranged occupying the entire area of the opposite surface of the chip while permitting use of a minimized length of wire leads for interconnection therebetween. This is achieved by (i) preparing a flat square IC chip which has an array of regularly spaced peripheral bonding pads the number of which along each of four chip sides is equally defined by a function of 2i(2i-1) where "i" is an integer and which also has external connection pads made of aluminum, (ii) sequentially forming nickel and gold coat films on the chip by electroless plating techniques, (iii) electrically coupling by metal contacts using thermal compression-bonding techniques the peripheral bonding pads to the pad layout conversion substrate for rearrangement of the peripheral bonding pads into the grid array of solder pads, and (iv) filling an adhesion resin between the conversion substrate and the IC chip.

Inventors

  • 👤 Masakazu Ishino
  • 👤 Ryohei Satoh
  • 👤 Mamoru Mita

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 08:22
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10W70/00; H10W70/60; H10W70/62; H10W70/63; H10W70/635; H10W70/65; H10W74/129; H10W90/00; H10W90/701; H10W70/654; H10W70/655; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20; H10W74/15

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 93 words
A semiconductor device comprising: an integrated circuit chip having a plurality of first electrodes disposed on the peripheral portion thereof; and a wiring portion having a plurality of second electrodes disposed on the peripheral portion of a first face of the wiring portion, and a plurality of third electrodes disposed on a second face of said wiring portion, said second electrodes being electrically connected to said third electrodes, the number N of said first electrodes and the number n of said third electrodes being provided to satisfy N=i(n-1), where i is an integer.
Claim 2
Dependent Claim 93 words
A semiconductor device comprising: an integrated circuit chip having a plurality of first electrodes disposed on the peripheral portion thereof; and a wiring portion having a plurality of second electrodes disposed on the peripheral portion of a first face of the wiring portion, and a plurality of third electrodes disposed on a second face of said wiring portion, said second electrodes being electrically connected to said third electrodes, the number N of said first electrodes and the number n of said third electrodes being provided to satisfy N=i(n-1), where i is an integer.
Claim 3
Dependent Claim 27 words
A semiconductor device according to claim 1, wherein the number N of said first electrodes and the number n of said third electrodes satisfy 4N=n 2 -1.
Claim 4
Dependent Claim 27 words
A semiconductor device according to claim 1, wherein the number N of said first electrodes and the number n of said third electrodes satisfy N=2i(2i-1) and n=4i-1.
Claim 5
Dependent Claim 16 words
A semiconductor device according to claim 1, wherein said third electrodes are disposed in an array.
Claim 6
Dependent Claim 50 words
A semiconductor device according to claim 1, wherein the plurality of first electrodes are disposed on a major surface of said integrated circuit chip, and the surface area of said integrated circuit chip major surface is substantially equal to the surface area of said second face of said wiring portion.
Claim 7
Dependent Claim 27 words
A semiconductor device according to claim 2, wherein the number N of said first electrodes and the number n of said third electrodes satisfy N=2i(2i-1) and n=4i-1.
Claim 8
Dependent Claim 16 words
A semiconductor device according to claim 2, wherein said third electrodes are disposed in an array.
Claim 9
Dependent Claim 37 words
A semiconductor device according to claim 2, wherein the number N of said first electrodes and the number n of said third electrodes satisfy N=2i(2i-1) and n=4i-1, and wherein said third electrodes are disposed in an array.
Claim 10
Dependent Claim 50 words
A semiconductor device according to claim 2, wherein the plurality of first electrodes are disposed on a major surface of said integrated circuit chip, and the surface area of said integrated circuit chip major surface is substantially equal to the surface area of said second face of said wiring portion.
Claim 11
Dependent Claim 71 words
A semiconductor device according to claim 2, wherein the number N of said first electrodes and the number n of said third electrodes satisfy N=2i(2i-1) and n=4i-1, and wherein the plurality of first electrodes are disposed on a major surface of said integrated circuit chip, and the surface area of said integrated circuit chip major surface is substantially equal to the surface area of said second face of said wiring portion.
Claim 12
Dependent Claim 60 words
A semiconductor device according to claim 2, wherein said third electrodes are disposed in an array, and wherein the plurality of first electrodes are disposed on a major surface of said integrated circuit chip, and the surface area of said integrated circuit chip major surface is substantially equal to the surface area of said second face of said wiring portion.
Claim 13
Dependent Claim 80 words
A semiconductor device according to claim 2, wherein the number N of said first electrodes and the number n of said third electrodes satisfy N=2i(2i-1) and n=4i-1, wherein said third electrodes are disposed in an array, and wherein the plurality of first electrodes are disposed on a major surface of said integrated circuit chip, and the surface area of said integrated circuit chip major surface is substantially equal to the surface area of said second face of said wiring portion.
Claim 14
Dependent Claim 16 words
A semiconductor device according to claim 3, wherein said third electrodes are disposed in an array.
Claim 15
Dependent Claim 50 words
A semiconductor device according to claim 3, wherein the plurality of first electrodes are disposed on a major surface of said integrated circuit chip, and the surface area of said integrated circuit chip major surface is substantially equal to the surface area of said second face of said wiring portion.
Claim 16
Dependent Claim 60 words
A semiconductor device according to claim 3, wherein said third electrodes are disposed in an array, and wherein the plurality of first electrodes are disposed on a major surface of said integrated circuit chip, and the surface area of said integrated circuit chip major surface is substantially equal to the surface area of said second face of said wiring portion.
Claim 17
Dependent Claim 50 words
A semiconductor device according to claim 4, wherein the plurality of first electrodes are disposed on a major surface of said integrated circuit chip, and the surface area of said integrated circuit chip major surface is substantially equal to the surface area of said second face of said wiring portion.

References Cited (Backward Citations)

JPS63175450A Cited
JPH01313969A Cited
JPH03116838A Cited
US5216278A Cited
US5433822A Cited
US5583377A Cited
US5382827A Cited
US5523622A Cited
US5640048A Cited
US5581122A Cited
US5598036A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-10-24 2004-04-24 2004-10-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-10-24 2008-04-24 2008-10-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-10-24 2012-04-24 2012-10-24 $7700.00 Window Closed / Lapsed

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