Wireless communications system having a layered space-time architecture employing multi-element antennas

Claim 2

A digital wireless receiver comprising a plurality of n antennas, each of the said antennas receiving a succession of complex signals over respective periods of time, τ, each of said complex signals being composed of a plurality of distinct randomly superimposed signal components, where n>1, wherein all of said signal components received by all of said receive antennas at a particular point in time collectively form a signal vector, a processor that forms said signal components received over said periods of time into respective space and time relationships, in which space is associated with respective transmitter antenna elements, and wherein said processor includes means that preprocesses, in turn, the signal vectors disposed within respective groups along a space-time diagonal by nulling out undecoded contributions to the succession of signal vectors received during the same period of time, τ, as the groups of signal vectors being preprocessed and to subtract out decoded contributions to the same succession of signal vectors in which said groups are associated with respective ones of said periods of time and respective ones of said transmitter antenna elements.

Claim 3

A digital wireless receiver comprising a plurality of n antennas, each of the said antennas receiving a succession of complex signals over respective periods of time, τ, each of said complex signals being composed of a plurality of distinct randomly superimposed signal components, where n>1, wherein all of said signal components received by all of said receive antennas at a particular point in time collectively form a signal vector, a processor that forms said signal components received over said periods of time into respective space and time relationships, in which space is associated with respective transmitter antenna elements, and wherein said processor includes means that preprocesses, in turn, the signal vectors within respective groups disposed along a space-time diagonal by maximizing the signal-to-noise ratio of the received transmitted signal component being so processed and to subtract out decoded contributions to the same succession of signal vectors, in which said groups are associated with respective ones of said periods of time and respective ones of said transmitter antenna elements.

Claim 4

A digital wireless receiver comprising a plurality of n antennas, each of the said antennas receiving a succession of complex signals over respective periods of time, τ, each of said complex signals being composed of a plurality of distinct randomly superimposed signal components, where n>1, wherein all of said signal components received by all of said receive antennas at a particular point in time collectively form a signal vector, a processor that forms said signal components received over said periods of time into respective space and time relationships, in which space is associated with respective transmitter antenna elements, and wherein said processor includes means that preprocesses, in turn, the signal vectors within respective groups disposed along a space-time diagonal by maximizing the signal-to-noise ratio of the received transmitted signal component being so processed and to subtract out decoded contributions to the same succession of signal vectors, in which said groups are associated with respective ones of said periods of time and respective ones of said transmitter antenna elements.

Claim 5

A receiver circuit comprising a plurality of antenna elements for receiving respective n-dimensional signal vectors signals transmitted by a transmitter, said transmitter also having n transmitting antenna elements, where n>1, a memory, a preprocessing circuit, said preprocessing circuit being operative for (a) unloading from memory one of said n-dimensional vectors that was received during a respective interval of time and that is associated with a respective one of said transmitting antenna elements, (b) subtracting from the unloaded n-dimensional vector detected symbols obtained as a result of preprocessing n-dimensional vectors associated with other ones of said transmitting antenna elements and said respective interval of time, (c) nulling out of the unloaded n-dimensional vector symbols associated with n-dimensional vectors that have not yet been processed, and wherein said preprocessing circuit includes means for outputting the result of said preprocessing if the preprocessing of a layer of n-dimensional vectors which includes the n-dimensional vector currently being processed has been completed and for unloading from said memory for preprocessing a next n-dimensional vector included in said layer.

Claim 6

A receiver circuit comprising a plurality of antenna elements for receiving respective n-dimensional signal vectors signals transmitted by a transmitter, said transmitter also having n transmitting antenna elements, where n>1, a memory, a preprocessing circuit, said preprocessing circuit being operative for (a) unloading from memory one of said n-dimensional vectors that was received during a respective interval of time and that is associated with a respective one of said transmitting antenna elements, (b) subtracting from the unloaded n-dimensional vector detected symbols obtained as a result of preprocessing n-dimensional vectors associated with other ones of said transmitting antenna elements and said respective interval of time, (c) nulling out of the unloaded n-dimensional vector symbols associated with n-dimensional vectors that have not yet been processed, and wherein said preprocessing circuit includes means for outputting the result of said preprocessing if the preprocessing of a layer of n-dimensional vectors which includes the n-dimensional vector currently being processed has been completed and for unloading from said memory for preprocessing a next n-dimensional vector included in said layer.

Claim 7

A receiver circuit comprising a plurality of antenna elements for receiving respective signal vectors signals transmitted by a transmitter, said transmitter also having a plurality of transmitting antenna elements, a signal preprocessing circuit, a decoder circuit, said signal preprocessing circuit being operative for processing each of said signal vectors to subtract from a signal vector currently being processed a decoded result obtained from decoding a previously detected transmitted signal that had been processed by said preprocessing circuit and to null out of the signal vector currently being processed other undetected elements of the transmitted signal, said decoder circuit being operative for then decoding the result obtained from the preprocessing of said signal vector.

Claim 8

A receiver circuit comprising a plurality of antenna elements for receiving respective signal vectors signals transmitted by a transmitter, said transmitter also having a plurality of transmitting antenna elements, a signal preprocessing circuit, a decoder circuit, said signal preprocessing circuit being operative for processing each of said signal vectors to subtract from a signal vector currently being processed a decoded result obtained from decoding a previously detected transmitted signal that had been processed by said preprocessing circuit and to null out of the signal vector currently being processed other undetected elements of the transmitted signal, said decoder circuit being operative for then decoding the result obtained from the preprocessing of said signal vector.

Claim 9

The receiver circuit of claim 4 wherein each said signal vector is an n dimensional complex signal vector, where n equals the number of said transmitting antenna elements.

Claim 10

The receiver circuit of claim 5 wherein said preprocessing circuit includes means that replicates n times each signal vector received during a predetermined interval of time and arranges the replicated result in time and space in accordance with said transmitting elements and presents for preprocessing a diagonal layer of replicated results associated with n-dimensional signal vectors associated with respective ones of the transmitting elements and received during a respective on the said interval of time.

Claim 11

The receiver circuit of claim 6 wherein said preprocessing of said diagonal layer starts with an n-dimensional signal vector received during the earliest point in time along said diagonal layer and ends with the preprocessing of an n-dimensional signal vector received during the latest point in time along said diagonal layer.

Claim 12

The receiver circuit of claim 7 wherein said preprocessing continues with a next, succeeding diagonal layer following the preprocessing of the n-dimensional signal vector received during the latest point in time.

Claim 13

The receiver of claim 4 further comprising a multiplexer circuit for multiplexing signals outputted by said decoder circuit.

Claim 14

A receiver circuit comprising a plurality of antenna elements for receiving as respective n-dimensional signal vectors signals transmitted by a transmitter, said transmitter also having n transmitting antenna elements, where n>1, a signal preprocessing circuit, a decoder circuit, said signal preprocessing circuit being operative for processing each of said n-dimensional signal vectors to subtract from a n-dimensional signal vector currently being processed a decoded result obtained from decoding a previously processed signal that had been processed by said preprocessing circuit and maximizing the signal to noise ratio of the received transmitted signal component being processed, said decoder circuit being operative for then decoding the result obtained from the preprocessing of each n-dimensional signal vector by said signal preprocessing circuit.

Claim 15

A receiver circuit comprising a plurality of antenna elements for receiving as respective n-dimensional signal vectors signals transmitted by a transmitter, said transmitter also having n transmitting antenna elements, where n>1, a signal preprocessing circuit, a decoder circuit, said signal preprocessing circuit being operative for processing each of said n-dimensional signal vectors to subtract from a n-dimensional signal vector currently being processed a decoded result obtained from decoding a previously processed signal that had been processed by said preprocessing circuit and maximizing the signal to noise ratio of the received transmitted signal component being processed, said decoder circuit being operative for then decoding the result obtained from the preprocessing of each n-dimensional signal vector by said signal preprocessing circuit.