US6097250A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Amplifier circuit
Assignee: Cisco Technology Inc
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Filing: 1999-04-22
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Granted: 2000-08-01
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Expires: 2019-04-22
Abstract
Abstract An amplifier circuit (400) includes an input port (402) for receiving a signal and a first balun (404) for splitting the signal into first and second signals. First and second amplifiers (406, 408) are coupled to outputs of the first balun (404) for respectively amplifying the outputs of the first balun (404) to generate first and second amplified signals. Second and third baluns (410, 412) are coupled, respectively, to outputs of the first and second amplifiers (406, 408) for splitting, respectively, each of the first and second amplified signals into in-phase and out-of-phase components. The amplifier circuit (400) also includes third and fourth amplifiers (414, 416) coupled to outputs of the second balun (410) for respectively amplifying the outputs of the second balun (410) to generate third and fourth amplified signals and fifth and sixth amplifiers (418, 420) coupled to outputs of the third balun (412) for respectively amplifying the outputs of the third balun (412) to generate fifth and sixth amplified signals. A fourth balun (422) combines the third and fourth amplified signals into a first combined signal, and a fifth balun (424) combines the fifth and sixth amplified signals into a second combined signal. The amplifier circuit (400) further includes a combiner, such as an additional balun (326) or a summer (430), for combining the first and second combined signals to generate an amplifier output signal.
Inventors
- 👤 Walid Kamali
- 👤 Saleh R. Al-Araji
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 20:40
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/60; H03F3/602; H03F3/604
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
183 words
An amplifier circuit comprising: an input port for receiving a signal; a first balun for splitting the signal into first and second signals; first and second amplifiers coupled to outputs of the first balun for respectively amplifying the outputs of the first balun to generate first and second amplified signals; second and third baluns coupled, respectively, to outputs of the first and second amplifiers for splitting, respectively, each of the first and second amplified signals into in-phase and out-of-phase components; third and fourth amplifiers coupled to outputs of the second balun for respectively amplifying the outputs of the second balun to generate third and fourth amplified signals; fifth and sixth amplifiers coupled to outputs of the third balun for respectively amplifying the outputs of the third balun to generate fifth and sixth amplified signals; a fourth balun for combining the third and fourth amplified signals into a first combined signal; a fifth balun for combining the fifth and sixth amplified signals into a second combined signal; and combining means for combining the first and second combined signals to generate an amplifier output signal.
Claim 2
Dependent Claim
183 words
An amplifier circuit comprising: an input port for receiving a signal; a first balun for splitting the signal into first and second signals; first and second amplifiers coupled to outputs of the first balun for respectively amplifying the outputs of the first balun to generate first and second amplified signals; second and third baluns coupled, respectively, to outputs of the first and second amplifiers for splitting, respectively, each of the first and second amplified signals into in-phase and out-of-phase components; third and fourth amplifiers coupled to outputs of the second balun for respectively amplifying the outputs of the second balun to generate third and fourth amplified signals; fifth and sixth amplifiers coupled to outputs of the third balun for respectively amplifying the outputs of the third balun to generate fifth and sixth amplified signals; a fourth balun for combining the third and fourth amplified signals into a first combined signal; a fifth balun for combining the fifth and sixth amplified signals into a second combined signal; and combining means for combining the first and second combined signals to generate an amplifier output signal.
Claim 3
Dependent Claim
19 words
The amplifier circuit of claim 1, further comprising: an output port coupled to an output of the combining means.
Claim 4
Dependent Claim
19 words
The amplifier circuit of claim 1, wherein the first and second amplifiers are included in a single gain block.
Claim 5
Dependent Claim
19 words
The amplifier circuit of claim 1, wherein the third and fourth amplifiers are included in a single gain block.
Claim 6
Dependent Claim
19 words
The amplifier circuit of claim 1, wherein the fifth and sixth amplifiers are included in a single gain block.
Claim 7
Dependent Claim
25 words
The amplifier circuit of claim 1, wherein the first and second signals provided by the first balun are 180° out of phase with one another.
Claim 8
Dependent Claim
20 words
The amplifier circuit of claim 6, wherein outputs of the second balun are 180° out of phase with one another.
Claim 9
Dependent Claim
20 words
The amplifier circuit of claim 7, wherein outputs of the third balun are 180° out of phase with one another.
Claim 10
Dependent Claim
31 words
The amplifier circuit of claim 8, wherein the first combined signal provided by the fourth balun is 180° out of phase with the second combined signal provided by the fifth balun.
Claim 11
Dependent Claim
31 words
The amplifier circuit of claim 9, wherein the combining means comprises a sixth balun for combining the first combined signal and the second combined signal to generate the amplifier output signal.
Claim 12
Dependent Claim
28 words
The amplifier circuit of claim 10, wherein the amplifier circuit is characterized by an input impedance of Z O and by an output impedance of Z O .
Claim 13
Dependent Claim
40 words
The amplifier circuit of claim 11, wherein: the first and sixth baluns are each characterized by an impedance of Z O ; and the second, third, fourth and fifth baluns are each characterized by an impedance of Z O /2.
Claim 14
Dependent Claim
30 words
The amplifier circuit of claim 8, wherein the first combined signal provided by the fourth balun is the same phase as the second combined signal provided by the fifth balun.
Claim 15
Dependent Claim
30 words
The amplifier circuit of claim 13, wherein the combining means comprises a summer for combining the first combined signal and the second combined signal to generate the amplifier output signal.
Claim 16
Dependent Claim
28 words
The amplifier circuit of claim 14, wherein the amplifier circuit is characterized by an input impedance of Z O and by an output impedance of Z O .
Claim 17
Dependent Claim
39 words
The amplifier circuit of claim 15, wherein: the first, second, and third baluns are each characterized by an impedance of Z O ; and the fourth and fifth baluns are each characterized by an impedance of 2Z O b.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-08-01 | 2004-01-31 | 2004-08-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-08-01 | 2008-01-31 | 2008-08-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-08-01 | 2012-01-31 | 2012-08-01 | $7700.00 | Window Closed / Lapsed |