US6096619A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing a semiconductor device comprising a capacitor with an intrinsic polysilicon electrode
Assignee: Renesas Electronics Corp
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Filing: 1998-01-07
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Granted: 2000-08-01
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Expires: 2018-01-07
Abstract
Abstract On a p + diffused region which is to be a lower electrode of a capacitor, a silicon nitride film which is a capacitor insulating layer is formed. An upper electrode is formed on this silicon nitride film. The upper electrode has a non-doped polycrystalline silicon film and a silicide layer. Non-doped polycrystalline silicon film is formed in contact with silicon nitride film. Silicide layer is formed on a surface of non-doped polycrystalline silicon film. Thus, a capacitor structure is obtained in which a larger capacitance and a higher breakdown voltage can be assured, so that it would not operate inaccurately even when it is integrated to a higher degree.
Inventors
- 👤 Fumitoshi Yamamoto
- 👤 Tetsuo Higuchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:07
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/834; H10D1/00; H10D1/60; H10D1/62; H10D1/66; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0135; H10D84/0144; Y; Y10; Y10S; Y10S257/00; Y10S257/915
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
86 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a lower electrode layer; forming a capacitor insulating layer on said layer electrode layer; and forming an upper electrode layer on said capacitor insulating layer so that it is insulated from said lower electrode; wherein the step of forming said upper electrode layer includes the steps of: forming a polycrystalline layer, substantially free of any impurities, to be in contact with said capacitor insulating layer; and forming silicide layer on said polycrystalline silicon layer.
Claim 2
Independent Claim
86 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a lower electrode layer; forming a capacitor insulating layer on said layer electrode layer; and forming an upper electrode layer on said capacitor insulating layer so that it is insulated from said lower electrode; wherein the step of forming said upper electrode layer includes the steps of: forming a polycrystalline layer, substantially free of any impurities, to be in contact with said capacitor insulating layer; and forming silicide layer on said polycrystalline silicon layer.
Claim 3
Dependent Claim
53 words
The method of manufacturing the semiconductor device in accordance with claim 1, further comprising the step of preparing a semiconductor substrate having a main surface; wherein said lower electrode layer is formed on the main surface of said semiconductor substrate to have a second polycrystalline silicon layer to which an impurity is introduced.
Claim 4
Dependent Claim
31 words
The method of manufacturing the semiconductor device in accordance with claim 2, wherein said lower electrode layer is formed to have a second silicide layer on said second polycrystalline silicon layer.
Claim 5
Dependent Claim
37 words
The method of manufacturing the semiconductor device in accordance with claim 1, wherein said capacitor insulating layer is formed to have a silicon nitride film and a first silicon oxide film formed on said silicon nitride film.
Claim 6
Dependent Claim
36 words
The method of manufacturing the semiconductor device in accordance with claim 4, wherein said capacitor insulating layer is formed to have a second silicon oxide film between said lower electrode layer and said silicon nitride film.
Claim 7
Dependent Claim
62 words
The method of manufacturing the semiconductor device in accordance with claim 1, further comprising the step of forming an interconnection layer in connection with said lower electrode layer; wherein the step of forming said interconnection layer includes the steps of: forming a barrier layer which is electrically connected to said silicide layer; and forming a layer including aluminum on said barrier layer.
Claim 8
Dependent Claim
27 words
The method of manufacturing the semiconductor device in accordance with claim 1, wherein said capacitor insulating layer is formed of a single layer of silicon nitride film.
Claim 9
Dependent Claim
47 words
The method of manufacturing the semiconductor device in accordance with claim 1, further comprising the step of preparing a semiconductor substrate having a main surface; wherein the step of forming said lower electrode layer includes forming an impurity region at the main surface of said semiconductor substrate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-08-01 | 2004-01-31 | 2004-08-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-08-01 | 2008-01-31 | 2008-08-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-08-01 | 2012-01-31 | 2012-08-01 | $7700.00 | Window Closed / Lapsed |