Semiconductor integrated circuit having bias circuits each including different reference resistors

Claim 2

A semiconductor circuit comprising: a reference voltage generating circuit which outputs a reference voltage; a first bias circuit connected to the reference voltage generating circuit, the first bias circuit having a first reference load element formed of a first material and generating a first bias voltage; a first driver circuit connected to the first bias circuit, the first driver circuit driving a first load element formed of the first material based on the first bias voltage; a second bias circuit connected to the reference voltage generating circuit, the second bias circuit having a second reference load element formed of a second material; and a second driver circuit connected to the second bias circuit, the second driver circuit driving a second load element formed of the second material based on the second bias voltage.

Claim 3

A semiconductor circuit according to claim 1, wherein said first bias circuit includes: a reference current generating circuit connected between a first power supply and a second power supply, and to said reference voltage generating circuit, the reference current generating circuit including the first reference load element and generating a reference current based on a resistance value of the first reference load element; and a current voltage converter connected between the first power supply and the second power supply, and to the reference current generating circuit, the current voltage converter converting the reference current to the first bias voltage.

Claim 4

A semiconductor circuit according to claim 2, wherein the reference current generating circuit includes: a voltage dividing circuit connected between the first power supply and the second power supply, the voltage dividing circuit outputting the divided voltage; a differential amplifier connected between the first power supply and the second power supply, and to the voltage dividing circuit and said reference voltage generating circuit, the differential amplifier outputs amplified voltage based on the reference voltage and the divided voltage; and a grounded source amplifier circuit connected between the first power supply and the second power supply, and to the differential amplifier, the grounded source amplifier circuit including the first reference load element and generating a reference current based on a first resistance value of the first reference load element.

Claim 5

A semiconductor circuit according to claim 1, wherein said first driver circuit is an operational amplifier having a non-inverting input terminal, an inverting input terminal, an bias input terminal connected to the first bias circuit and an output terminal connected to the first load element.

Claim 6

A semiconductor circuit according to claim 1, wherein the first reference load element is a diffusion resistor and the first material is a silicon substrate and impurity.

Claim 7

A semiconductor circuit according to claim 2, wherein said first driver circuit and the current voltage converter have constant current transistors, respectively, and wherein the constant current transistors constitute a current mirror circuit.

Claim 8

A semiconductor circuit according to claim 1, wherein said second bias circuit includes: a reference current generating circuit connected between a first power supply and a second power supply, and to said reference voltage generating circuit, the reference current generating circuit including the second reference load element and generating a reference current based on a resistance value of the second reference load element; and a current voltage converter connected between the first power supply and the second power supply, and to the reference current generating circuit, the current voltage converter converting the reference current to the second bias voltage.

Claim 9

A semiconductor circuit according to claim 7, wherein the reference current generating circuit includes: a voltage dividing circuit connected between the first power supply and the second power supply, the voltage dividing circuit outputting the divided voltage; a differential amplifier connected between the first power supply and the second power supply, and to the voltage dividing circuit and said reference voltage generating circuit, the differential amplifier outputs amplified voltage based on the reference voltage and the divided voltage; and a grounded source amplifier circuit connected between the first power supply and the second power supply, and to the differential amplifier, the grounded source amplifier circuit including the second reference load element and generating a second reference current based on a resistance value of the second reference load element.

Claim 10

A semiconductor circuit according to claim 1, wherein said second driver circuit is an operational amplifier having a non-inverting input terminal, an inverting input terminal, an bias input terminal connected to the second bias circuit and an output terminal connected to the second load element.

Claim 11

A semiconductor circuit according to claim 1, wherein the second reference load element is a polycrystal silicon resistor and the second material is polycrystal silicon.

Claim 12

A semiconductor circuit according to claim 7, wherein said second driver circuit and the current voltage converter have constant current transistors, respectively, and wherein the constant current transistors constitute a current mirror circuit.

Claim 13

A semiconductor circuit according to claim 1, further comprising: a third bias circuit connected to the reference voltage generating circuit, the third bias circuit having a third reference load element formed of a third material; and a third driver circuit connected to the third bias circuit, the third driver circuit driving a third load element formed of the third material based on the third bias voltage.

Claim 14

A semiconductor circuit according to claim 12, wherein the third reference load element is an external resistor and the third load element is another external resistor.

Claim 15

A semiconductor circuit comprising: a reference voltage generating circuit which outputs a reference voltage; a reference current generating circuit connected between the first power supply and the second power supply, and to said reference voltage generating circuit, the reference current generating circuit including a reference load element and generating a reference current based on a resistance value of the reference load element; a first current voltage converter connected between the first power supply and the second power supply, and to the reference current generating circuit, the first current voltage converter converting the reference current to the first bias voltage; a first driver circuit connected to the first current voltage converter, the first driver circuit driving a first load element based on the first bias voltage; a second current voltage converter connected between the first power supply and the second power supply, and to the reference current generating circuit, the second current voltage converter converting the reference current to the second bias voltage; a second driver circuit connected to the second current voltage converter, the second driver circuit driving a second load element based on the second bias voltage; and a control circuit connected to the first and second current voltage converters, the control circuit receiving a control signal and disabling at least one of the first and second current voltage converters in response to the control signal.

Claim 16

A semiconductor circuit comprising: a reference voltage generating circuit which outputs a reference voltage; a reference current generating circuit connected between the first power supply and the second power supply, and to said reference voltage generating circuit, the reference current generating circuit including a reference load element and generating a reference current based on a resistance value of the reference load element; a first current voltage converter connected between the first power supply and the second power supply, and to the reference current generating circuit, the first current voltage converter converting the reference current to the first bias voltage; a first driver circuit connected to the first current voltage converter, the first driver circuit driving a first load element based on the first bias voltage; a second current voltage converter connected between the first power supply and the second power supply, and to the reference current generating circuit, the second current voltage converter converting the reference current to the second bias voltage; a second driver circuit connected to the second current voltage converter, the second driver circuit driving a second load element based on the second bias voltage; and a control circuit connected to the first and second current voltage converters, the control circuit receiving a control signal and disabling at least one of the first and second current voltage converters in response to the control signal.

Claim 17

A semiconductor circuit according to claim 14, wherein the reference current generating circuit includes: a voltage dividing circuit connected between the first power supply and the second power supply, the voltage dividing circuit outputting the divided voltage; a differential amplifier connected between the first power supply and the second power supply, and to the voltage dividing circuit and said reference voltage generating circuit, the differential amplifier outputs amplified voltage based on the reference voltage and the divided voltage; and a grounded source amplifier circuit connected between the first power supply and the second power supply, and to the differential amplifier, the grounded source amplifier circuit including the reference load element and generating a reference current based on a resistance value of the reference load element.

Claim 18

A semiconductor circuit according to claim 14, wherein said first driver circuit is an operational amplifier having a non-inverting input terminal, an inverting input terminal, an bias input terminal connected to the first current voltage converter and an output terminal connected to the first load element.

Claim 19

A semiconductor circuit according to claim 14, wherein said second driver circuit is an operational amplifier having a non-inverting input terminal, an inverting input terminal, an bias input terminal connected to the second current voltage converter and an output terminal connected to the second load element.

Claim 20

A semiconductor circuit according to claim 14, wherein said first driver circuit and said first current voltage converter have constant current transistors, respectively, and wherein the constant current transistors constitute a current mirror circuit.

Claim 21

A semiconductor circuit according to claim 14, wherein said second driver circuit and said second current voltage converter have constant current transistors, respectively, and wherein the constant current transistors constitute a current mirror circuit.