Patent US6094040A successfully refreshed from Google Patents.
US6094040A
Expired / Lapsed
US
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Voltage regulator circuit
Assignee: Endress and Hauser SE and Co KG
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Filing: 1999-03-04
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Granted: 2000-07-25
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Expires: 2019-03-04
Abstract
Abstract A voltage regulator circuit for generating a regulated output DC voltage from a non-regulated DC or AC voltage, comprises an input rectifier circuit for rectifying the non-regulated AC voltage and a series regulator, containing a gate-controllable transistor, which regulates the output voltage supplied to it by the rectifier to a first voltage value. The transistor of the series regulator is a field-effect transistor (20) which in the ON condition charges a charging capacitor (46), the charging voltage of which forms the regulated output voltage. Connected to the gate terminal (21) of the field-effect transistor is a first threshold circuit (26, 28, 30, 32) receiving the non-regulated DC voltage which applies to this gate terminal (21) a voltage turning OFF the field-effect transistor (20) as soon as the non-regulated DC voltage exceeds a predetermined threshold value. Furthermore, connected to the gate terminal (21) of the field-effect transistor (20) is a second threshold circuit (36, 38, 40, 42) receiving the regulated output DC voltage which applies to this gate terminal (21) a voltage turning OFF the field-effect transistor (20) as soon as the regulated output DC voltage exceeds a predetermined design value.
Inventors
- 👤 Jurgen Meier
- 👤 Hans-Jorg Florenz
- 👤 Armin Wernet
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 18:09
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/575
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
198 words
A voltage regulator circuit for generating a regulated output DC voltage from a non-regulated DC or AC voltage, comprising an input rectifier circuit for rectifying said non-regulated AC voltage and a series regulator containing a gate-controllable transistor, which regulates the output voltage supplied to it by said rectifier to a first voltage value, characterized in that said transistor of said series regulator is a field-effect transistor (20) which in the ON condition charges a charging capacitor (46), the charging voltage of which forms said regulated output voltage, in that connected to a gate terminal (21) of said field-effect transistor (20) is a first threshold circuit (26, 28, 30, 32) receiving said non-regulated DC voltage which applies to said gate terminal (21) a voltage turning OFF said field-effect transistor (20) as soon as said non-regulated DC voltage exceeds a predetermined threshold value, and in that connected to said gate terminal (21) of said field-effect transistor (20) is a second threshold circuit (36, 38, 40, 22) receiving said regulated output DC voltage which applies to said gate terminal (21) a voltage turning OFF said field-effect transistor (20) as soon as said regulated output DC voltage exceeds a predetermined design value.
Claim 2
Dependent Claim
198 words
A voltage regulator circuit for generating a regulated output DC voltage from a non-regulated DC or AC voltage, comprising an input rectifier circuit for rectifying said non-regulated AC voltage and a series regulator containing a gate-controllable transistor, which regulates the output voltage supplied to it by said rectifier to a first voltage value, characterized in that said transistor of said series regulator is a field-effect transistor (20) which in the ON condition charges a charging capacitor (46), the charging voltage of which forms said regulated output voltage, in that connected to a gate terminal (21) of said field-effect transistor (20) is a first threshold circuit (26, 28, 30, 32) receiving said non-regulated DC voltage which applies to said gate terminal (21) a voltage turning OFF said field-effect transistor (20) as soon as said non-regulated DC voltage exceeds a predetermined threshold value, and in that connected to said gate terminal (21) of said field-effect transistor (20) is a second threshold circuit (36, 38, 40, 22) receiving said regulated output DC voltage which applies to said gate terminal (21) a voltage turning OFF said field-effect transistor (20) as soon as said regulated output DC voltage exceeds a predetermined design value.
Claim 3
Dependent Claim
109 words
The voltage regulator circuit as set form in claim 1, characterized in that said first threshold circuit contains, between the positive output terminal of said rectifier (18) and the negative output terminal of said rectifier (18) forming ground, a voltage divider of two resistors (26, 28) connected in series, the pick-off point (34) of which is connected to said gate terminal of a field-effect transistor (30), the drain terminal of said field-effect transistor (30) being connected to said gate terminal of said field-effect transistor (20) of said series regulator while its source terminal is connected to the cathode of a Zener diode (32), the anode of which is grounded.
Claim 4
Dependent Claim
104 words
The voltage regulator circuit as set form in claim 1, characterized in that said second threshold circuit contains connected to said regulated output DC voltage a voltage divider comprising a series connection of a resistor (36), a Zener diode (38) and a further resistor (40) as well as a bipolar npn transistor (42), the base of which is connected to a connecting point (48) between said anode of said Zener diode (38) and said further resistor (40) and the collector-emitter junction of said bipolar npn transistor (42) is connected between said gate terminal of said field-effect transistor (20) of said series regulator and ground.
Claim 5
Dependent Claim
104 words
The voltage regulator circuit as set form in claim 2, characterized in that said second threshold circuit contains connected to said regulated output DC voltage a voltage divider comprising a series connection of a resistor (36), a Zener diode (38) and a further resistor (40) as well as a bipolar npn transistor (42), the base of which is connected to a connecting point (48) between said anode of said Zener diode (38) and said further resistor (40) and the collector-emitter junction of said bipolar npn transistor (42) is connected between said gate terminal of said field-effect transistor (20) of said series regulator and ground.
References Cited (Backward Citations)
US4642746A
Cited
US4754388A
Cited
US4967138A
Cited
US4893228A
Cited
US5191278A
Cited
US5773965A
Cited
US5686821A
Cited
EP0811901A2
Cited
US5754388A
Cited
US5889390A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-07-25 | 2004-01-24 | 2004-07-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-07-25 | 2008-01-24 | 2008-07-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-07-25 | 2012-01-24 | 2012-07-25 | $7700.00 | Window Closed / Lapsed |