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US6070256A
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Method and apparatus for self-testing multi-port RAMs
Assignee: Nortel Networks Ltd
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Filing: 1998-02-19
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Granted: 2000-05-30
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Expires: 2018-02-19
Abstract
Abstract A method for and apparatus of testing a multi-port RAM (random access memory) detect single port faults and inter port shorts in multi-port random access memories. The algorithm performs a conventional single-port test such as MARCH or SMARCH on one port of the memory and performs an inter-port test on all other ports. The algorithm does not impose any extra test time and requires the addition of only a few gates to a conventional single-port BIST controller, independently of the size of the memory. An address to select ports of the multi-port RAM includes a row address signal of a plurality of bits. A specific bit of the row address signal is changed.
Inventors
- 👤 Yuejian Wu
- 👤 Sanjay Gupta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 14:59
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/04; G11C29/08; G11C29/12; G11C29/18; G11C29/30; G11C29/34
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
83 words
A method of testing a multi-port RAM (random access memory) comprising RAM cells of m rows by n columns, each RAM cell including storage means for storing binary data, the rows and columns of the RAM cells being addressed by an address signal comprising a row address signal having a plurality of bits, the method comprising the step of inverting the second least significant bit of the row address signal of the address signal provided to the selected ports of the multi-port RAM.
Claim 2
Independent Claim
83 words
A method of testing a multi-port RAM (random access memory) comprising RAM cells of m rows by n columns, each RAM cell including storage means for storing binary data, the rows and columns of the RAM cells being addressed by an address signal comprising a row address signal having a plurality of bits, the method comprising the step of inverting the second least significant bit of the row address signal of the address signal provided to the selected ports of the multi-port RAM.
Claim 3
Independent Claim
74 words
An apparatus for testing a multi-port RAM comprising RAM cells of m rows by n columns, each RAM cell including storage means for storing binary data, the rows and columns of the RAM cells being addressed by an address signal of a plurality of bits, the apparatus comprising address modifier means for modifying a specific bit of the row address signal of the address signal provided to the selected ports of the multi-port RAM.
Claim 4
Independent Claim
74 words
An apparatus for testing a multi-port RAM comprising RAM cells of m rows by n columns, each RAM cell including storage means for storing binary data, the rows and columns of the RAM cells being addressed by an address signal of a plurality of bits, the apparatus comprising address modifier means for modifying a specific bit of the row address signal of the address signal provided to the selected ports of the multi-port RAM.
Claim 5
Dependent Claim
21 words
The apparatus of claim 2, wherein the address modifier means inverts the second least significant bit of the row address signal.
Claim 6
Dependent Claim
19 words
The apparatus of claim 2, wherein the RAM has a plurality of ports which are read and/or write ports.
Claim 7
Dependent Claim
12 words
The apparatus of claim 2, wherein the RAM is a dual-port RAM.
Claim 8
Dependent Claim
17 words
The apparatus of claim 2, wherein the dual-port RAM has a write-only port and a read-only port.
Claim 9
Dependent Claim
20 words
The apparatus of claim 2, further comprising means for enabling the address modifier means when a port writes the RAM.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-05-30 | 2003-11-29 | 2004-05-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-05-30 | 2007-11-29 | 2008-05-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-05-30 | 2011-11-29 | 2012-05-30 | $7700.00 | Window Closed / Lapsed |