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US6066866A
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US
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Semiconductor device with alternating general-purpose functional regions and specific functional regions
Assignee: Mitsubishi Electric Corp
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Filing: 1998-06-09
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Granted: 2000-05-23
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Expires: 2018-06-09
Abstract
Abstract When constructing a number of transistors in transistor forming region (1) on a semiconductor substrate, a plurality of specific functional regions and a plurality of general-purpose functional regions are formed in the transistor forming region (1) in such a way that each of the plurality of specific functional regions alternates with each of the plurality of general-purpose functional regions. Each of the plurality of general-purpose functional regions is comprised of at least one general-purpose functional bank (4) including a row of P-channel field-effect transistors and a row of N-channel field-effect transistors. Each of the plurality of specific functional regions is comprised of at least one specific functional bank (5) including a row of functional blocks (6) each of which can perform a specific function.
Inventors
- 👤 Naoko Omori
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 15:35
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/90; H10D84/903; H10D84/907
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
143 words
A semiconductor device comprising: a semiconductor substrate on which a plurality of specific functional regions, wherein each of said plurality of specific functional regions is comprised of at least one specific functional bank including a row of functional blocks which are each provided with a plurality of first transistors and second transistors of a size different than said first transistors, and a plurality of general-purpose functional regions, wherein each of said plurality of general-purpose functional regions is comprised of at least one general-purpose functional bank provided with a plurality of third transistors including a row of P-channel field-effect transistors and a row of N-channel field-effect transistors, are formed in such a way that each of said plurality of specific functional regions alternates with each of said plurality of general-purpose functional regions, wherein said first transistors are smaller in size than said third transistors.
Claim 2
Dependent Claim
143 words
A semiconductor device comprising: a semiconductor substrate on which a plurality of specific functional regions, wherein each of said plurality of specific functional regions is comprised of at least one specific functional bank including a row of functional blocks which are each provided with a plurality of first transistors and second transistors of a size different than said first transistors, and a plurality of general-purpose functional regions, wherein each of said plurality of general-purpose functional regions is comprised of at least one general-purpose functional bank provided with a plurality of third transistors including a row of P-channel field-effect transistors and a row of N-channel field-effect transistors, are formed in such a way that each of said plurality of specific functional regions alternates with each of said plurality of general-purpose functional regions, wherein said first transistors are smaller in size than said third transistors.
Claim 3
Dependent Claim
49 words
The semiconductor device according to claim 1, wherein in each general-purpose functional bank, a direction in which said rows of P-channel and N-channel field-effect transistors are aligned is parallel to a direction in which the length of the gate electrodes of the P-channel and N-channel field-effect transistors is oriented.
Claim 4
Dependent Claim
49 words
The semiconductor device according to claim 1, wherein in each general-purpose functional bank, a direction in which said rows of P-channel and N-channel field-effect transistors are arranged is orthogonal to a direction in which the length of the gate electrodes of the P-channel and N-channel field-effect transistors is oriented.
Claim 5
Dependent Claim
24 words
The semiconductor device according to claim 1, wherein said row of functional blocks is a flip-flop and said flip-flop is a set-reset scan flip-flop.
Claim 6
Dependent Claim
21 words
The semiconductor device according to claim 1, wherein at least one common signal is applied to said row of functional blocks.
References Cited (Backward Citations)
US4161662A
Cited
US4750027A
Cited
US4786613A
Cited
US5060046A
Cited
JPH03209847A
Cited
US5404034A
Cited
US5663662A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-05-23 | 2003-11-22 | 2004-05-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-05-23 | 2007-11-22 | 2008-05-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-05-23 | 2011-11-22 | 2012-05-23 | $7700.00 | Window Closed / Lapsed |