← Back to Patent Explorer
US6066531A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for manufacturing semiconductor memory device

Assignee: Sharp Corp
•
Filing: 1998-06-18
•
Granted: 2000-05-23
•
Expires: 2018-06-18
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method for manufacturing a semiconductor memory device, including the steps of: forming a plurality of stripes comprising a first floating gate material film and a ion implantation protective film, covering one longitudinal side wall of the stripes with a resist pattern; removing a given width of the other side wall of the first floating gate material film by an isotropic etching in use of the resist pattern as a mask; forming an impurity region of low concentration by implanting impurity ions of a second conductivity type into the semiconductor substrate of the first conductivity type in use of the ion implantation protective film as a mask in a tilted direction after removing the resist pattern; and forming asymmetrical impurity regions on both sides of the stripe like first floating gate material film as viewed in the cross section along the direction perpendicular to the longitudinal direction of the stripes. According to the above-mentioned method, without using a side wall spacer, a semiconductor memory device provided with asymmetrical impurity regions having precisely desired forms can be obtained.

Inventors

  • 👤 Yukiharu Akiyama
  • 👤 Takuji Tanigami
  • 👤 Shinichi Sato

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 20:21
CPC Classifications
H; H10; H10B; H10B41/00; H10B41/30

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 270 words
A method for manufacturing a semiconductor memory device, comprising the steps of: forming a gate insulating film, a first floating gate material film and an ion implantation protective film in this order over the surface of a semiconductor substrate of a first conductivity type; forming a first resist pattern on the ion implantation protective film; forming a plurality of stripes comprising the first floating gate material film and the ion implantation protective film, the stripes being spaced apart from each other by a given distance, by etching in use of the first resist pattern as a mask; forming a second resist pattern to cover one longitudinal side wall of the stripes after removing the first resist pattern; removing a given width of the other side wall of the first floating gate material film by an isotropic etching with the second resist pattern used as a mask; forming an impurity region of a low concentration by implanting impurity ions of a second conductivity type into the semiconductor substrate of the first conductivity type with the ion implantation protective film used as a mask in a tilted direction after removing the second resist pattern; and forming asymmetrical impurity regions on both sides of the stripe like first floating gate material film as viewed in the cross section along the direction perpendicular to the longitudinal direction of the stripes by implanting impurity ions of the second conductivity type into the semiconductor substrate of the first conductivity type with the ion implantation protective film used as a mask in the direction perpendicular to the semiconductor substrate to form an impurity region of high concentration.
Claim 2
Independent Claim 270 words
A method for manufacturing a semiconductor memory device, comprising the steps of: forming a gate insulating film, a first floating gate material film and an ion implantation protective film in this order over the surface of a semiconductor substrate of a first conductivity type; forming a first resist pattern on the ion implantation protective film; forming a plurality of stripes comprising the first floating gate material film and the ion implantation protective film, the stripes being spaced apart from each other by a given distance, by etching in use of the first resist pattern as a mask; forming a second resist pattern to cover one longitudinal side wall of the stripes after removing the first resist pattern; removing a given width of the other side wall of the first floating gate material film by an isotropic etching with the second resist pattern used as a mask; forming an impurity region of a low concentration by implanting impurity ions of a second conductivity type into the semiconductor substrate of the first conductivity type with the ion implantation protective film used as a mask in a tilted direction after removing the second resist pattern; and forming asymmetrical impurity regions on both sides of the stripe like first floating gate material film as viewed in the cross section along the direction perpendicular to the longitudinal direction of the stripes by implanting impurity ions of the second conductivity type into the semiconductor substrate of the first conductivity type with the ion implantation protective film used as a mask in the direction perpendicular to the semiconductor substrate to form an impurity region of high concentration.
Claim 3
Dependent Claim 17 words
The method of claim 1, wherein the impurity ions of the second conductivity type are arsenic ions.
Claim 4
Dependent Claim 13 words
The method of claim 1, wherein the stripes are formed by anisotropic etching.
Claim 5
Dependent Claim 27 words
The method of claim 1, wherein the stripes are formed so that they are spaced apart from each other by a distance of 0.18 to 0.65 μm.
Claim 6
Dependent Claim 25 words
The method of claim 1, wherein the other side of the first floating gate material film is removed by 0.15 to 0.25 μm in width.
Claim 7
Dependent Claim 43 words
The method of claim 1, wherein the impurity ions of the second conductivity type implanted in the tilted direction are implanted into the silicon substrate in a tilted angle of 5 to 50° with respect to the line perpendicular to the semiconductor substrate.
Claim 8
Dependent Claim 31 words
The method of claim 1, wherein an oxide film is formed by selective oxidation of the semiconductor substrate which is not covered with the stripes, after forming the asymmetrical impurity regions.
Claim 9
Dependent Claim 21 words
The method of claim 7, wherein the oxide film has approximately the same height as the first floating gate material film.
Claim 10
Dependent Claim 77 words
The method of claim 1, further comprising steps of: after forming the impurity regions and removing the ion implantation protective film, forming a second floating gate material film, an insulating film and a control gate material film in this order over the entire surface of the semiconductor substrate; and forming a first floating gate, a second floating gate and a control gate by etching with a third resist pattern of a given shape used as a mask.
Claim 11
Dependent Claim 17 words
The method of claim 9, wherein the first floating gate is covered with the second floating gate.

References Cited (Backward Citations)

US5210044A Cited
JPH04137558A Cited
US5292675A Cited
US5436205A Cited
US5648668A Cited
US5482879A Cited
JPH09102554A Cited
US5759896A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-05-23 2003-11-22 2004-05-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-05-23 2007-11-22 2008-05-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-05-23 2011-11-22 2012-05-23 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag