US6064947A
Expired / Lapsed
US
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Time base generator internal voltage-controlled oscillator calibration system and method
Assignee: Texas Instruments Inc
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Filing: 1997-08-27
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Granted: 2000-05-16
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Expires: 2017-08-27
Abstract
Abstract A successive approximation system and method for calibrating an oscillator in a time base generator application. An oscillator output frequency is compared to a reference frequency. Control logic calibrates an input control current to the oscillator, one bit at a time, through a digital-to-analog converter. The calibrated input control current corrects central frequency errors in the oscillator. Successive approximation continues until all bits are tested.
Inventors
- 👤 Bo Sun
- 👤 Kirby Lam
- 👤 Rodney Masumoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 16:21
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/099; G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; H03L7/10; H03L7/105; H03L7/16; H03L7/18; G11B20/12; G11B20/1217; G11B20/1258
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
59 words
A system for optimizing data access in a dynamic circuit parameter environment comprising: a processor; a memory device, wherein said memory device is coupled to said processor and wherein said memory device includes a channel; and a time base generator coupled to said channel for calibrating a frequency within said channel to a reference frequency set by a user.
Claim 2
Independent Claim
59 words
A system for optimizing data access in a dynamic circuit parameter environment comprising: a processor; a memory device, wherein said memory device is coupled to said processor and wherein said memory device includes a channel; and a time base generator coupled to said channel for calibrating a frequency within said channel to a reference frequency set by a user.
Claim 3
Dependent Claim
20 words
A system for optimizing data access as claimed in claim 1, wherein said channel is a zoned recording read channel.
Claim 4
Dependent Claim
20 words
A system for optimizing data access as claimed in claim 1, wherein said channel is a zoned recording write channel.
Claim 5
Dependent Claim
19 words
A system for optimizing data access as claimed in claim 1, wherein said memory device is a disk drive.
Claim 6
Dependent Claim
20 words
A system for optimizing data access as claimed in claim 4, wherein said disk drive is an optical disk drive.
Claim 7
Dependent Claim
20 words
A system for optimizing data access as claimed in claim 4, wherein said disk drive is a hard disk drive.
Claim 8
Dependent Claim
20 words
A system for optimizing data access as claimed in claim 1, wherein said memory device is a magnetic tape drive.
Claim 9
Dependent Claim
18 words
A system for optimizing data access as claimed in claim 1, wherein said frequency within said channel fluctuates.
Claim 10
Dependent Claim
175 words
A circuit for calibrating an oscillator frequency to a reference frequency in a time base generator application comprising: a control block including a first input terminal for receiving an oscillator signal, a second input terminal for receiving a reference signal set by a user, a signal detector for detecting a first arrival of either said oscillator signal or said reference signal at said control block, and control logic for providing a digital signal corresponding to said first arrival; a digital-to-analog converter (DAC) interfaced with said control block, wherein said DAC receives said digital signal and converts said digital signal into an analog signal; an adder coupled to said DAC, wherein said adder includes a first input terminal for receiving said analog signal and a second input terminal for receiving a control current and wherein said adder adds said analog signal to said control current, thereby producing a summed signal; and an oscillator connected to said adder, wherein said oscillator receives said summed signal and wherein said summed signal adjusts a center frequency of said oscillator.
Claim 11
Dependent Claim
175 words
A circuit for calibrating an oscillator frequency to a reference frequency in a time base generator application comprising: a control block including a first input terminal for receiving an oscillator signal, a second input terminal for receiving a reference signal set by a user, a signal detector for detecting a first arrival of either said oscillator signal or said reference signal at said control block, and control logic for providing a digital signal corresponding to said first arrival; a digital-to-analog converter (DAC) interfaced with said control block, wherein said DAC receives said digital signal and converts said digital signal into an analog signal; an adder coupled to said DAC, wherein said adder includes a first input terminal for receiving said analog signal and a second input terminal for receiving a control current and wherein said adder adds said analog signal to said control current, thereby producing a summed signal; and an oscillator connected to said adder, wherein said oscillator receives said summed signal and wherein said summed signal adjusts a center frequency of said oscillator.
Claim 12
Dependent Claim
18 words
A circuit for calibrating an oscillator as claimed in claim 9, wherein said oscillator is a voltage-controlled oscillator.
Claim 13
Dependent Claim
178 words
A circuit for calibrating an oscillator frequency to a reference frequency in a time base generator application comprising: a control block including a first input terminal for receiving an oscillator signal, a second input terminal for receiving a reference signal, a signal detector for detecting a first arrival of either said oscillator signal or said reference signal at said control block, and control logic for providing a digital signal corresponding to said first arrival; a digital-to-analog converter (DAC) interfaced with said control block, wherein said DAC receives said digital signal and converts said digital signal into an analog signal; an adder coupled to said DAC, wherein said adder includes a first input terminal for receiving said analog signal and a second input terminal for receiving a control current and wherein said adder adds said analog signal to said control current, thereby producing a summed signal; and an oscillator connected to said adder, wherein said oscillator receives said summed signal and wherein said summed signal adjusts a center frequency of said oscillator, wherein said oscillator is a current-controlled oscillator.
Claim 14
Dependent Claim
178 words
A circuit for calibrating an oscillator frequency to a reference frequency in a time base generator application comprising: a control block including a first input terminal for receiving an oscillator signal, a second input terminal for receiving a reference signal, a signal detector for detecting a first arrival of either said oscillator signal or said reference signal at said control block, and control logic for providing a digital signal corresponding to said first arrival; a digital-to-analog converter (DAC) interfaced with said control block, wherein said DAC receives said digital signal and converts said digital signal into an analog signal; an adder coupled to said DAC, wherein said adder includes a first input terminal for receiving said analog signal and a second input terminal for receiving a control current and wherein said adder adds said analog signal to said control current, thereby producing a summed signal; and an oscillator connected to said adder, wherein said oscillator receives said summed signal and wherein said summed signal adjusts a center frequency of said oscillator, wherein said oscillator is a current-controlled oscillator.
Claim 15
Dependent Claim
209 words
A circuit for calibrating an oscillator frequency to a reference frequency in a time base generator application comprising: a control block including a first input terminal for receiving an oscillator signal, a second input terminal for receiving a reference signal, a signal detector for detecting a first arrival of either said oscillator signal or said reference signal at said control block, and control logic for providing a digital signal corresponding to said first arrival; a digital-to-analog converter (DAC) interfaced with said control block, wherein said DAC receives said digital signal and converts said digital signal into an analog signal; an adder coupled to said DAC, wherein said adder includes a first input terminal for receiving said analog signal and a second input terminal for receiving a control current and wherein said adder adds said analog signal to said control current, thereby producing a summed signal; and an oscillator connected to said adder, wherein said oscillator receives said summed signal and wherein said summed signal adjusts a center frequency of said oscillator, wherein said control block further includes a sequential approximation register for sequentially adjusting one bit of said digital signal each time said signal detector detects said first arrival, until all bits in said digital signal have been adjusted.
Claim 16
Dependent Claim
209 words
A circuit for calibrating an oscillator frequency to a reference frequency in a time base generator application comprising: a control block including a first input terminal for receiving an oscillator signal, a second input terminal for receiving a reference signal, a signal detector for detecting a first arrival of either said oscillator signal or said reference signal at said control block, and control logic for providing a digital signal corresponding to said first arrival; a digital-to-analog converter (DAC) interfaced with said control block, wherein said DAC receives said digital signal and converts said digital signal into an analog signal; an adder coupled to said DAC, wherein said adder includes a first input terminal for receiving said analog signal and a second input terminal for receiving a control current and wherein said adder adds said analog signal to said control current, thereby producing a summed signal; and an oscillator connected to said adder, wherein said oscillator receives said summed signal and wherein said summed signal adjusts a center frequency of said oscillator, wherein said control block further includes a sequential approximation register for sequentially adjusting one bit of said digital signal each time said signal detector detects said first arrival, until all bits in said digital signal have been adjusted.
Claim 17
Dependent Claim
186 words
A circuit for calibrating an oscillator frequency to a reference frequency in a time base generator application comprising: a control block including a first input terminal for receiving an oscillator signal, a second input terminal for receiving a reference signal, a signal detector for detecting a first arrival of either said oscillator signal or said reference signal at said control block, and control logic for providing a digital signal corresponding to said first arrival; a digital-to-analog converter (DAC) interfaced with said control block, wherein said DAC receives said digital signal and converts said digital signal into an analog signal; an adder coupled to said DAC, wherein said adder includes a first input terminal for receiving said analog signal and a second input terminal for receiving a control current and wherein said adder adds said analog signal to said control current, thereby producing a summed signal; and an oscillator connected to said adder, wherein said oscillator receives said summed signal and wherein said summed signal adjusts a center frequency of said oscillator, wherein said sequential approximation register first adjusts the most significant bit of said digital signal.
Claim 18
Dependent Claim
186 words
A circuit for calibrating an oscillator frequency to a reference frequency in a time base generator application comprising: a control block including a first input terminal for receiving an oscillator signal, a second input terminal for receiving a reference signal, a signal detector for detecting a first arrival of either said oscillator signal or said reference signal at said control block, and control logic for providing a digital signal corresponding to said first arrival; a digital-to-analog converter (DAC) interfaced with said control block, wherein said DAC receives said digital signal and converts said digital signal into an analog signal; an adder coupled to said DAC, wherein said adder includes a first input terminal for receiving said analog signal and a second input terminal for receiving a control current and wherein said adder adds said analog signal to said control current, thereby producing a summed signal; and an oscillator connected to said adder, wherein said oscillator receives said summed signal and wherein said summed signal adjusts a center frequency of said oscillator, wherein said sequential approximation register first adjusts the most significant bit of said digital signal.
Claim 19
Independent Claim
97 words
A method for calibrating an oscillator to a reference frequency in a time base generator, wherein said steps include: enabling detection of an oscillator signal; enabling detection of a reference signal set by a user; detecting a first occurrence of either said oscillator signal or said reference signal at a control block; providing a digital signal that corresponds to said first occurrence; converting said digital signal into an analog signal; receiving a control current; adding said analog signal to said control current, thereby producing a summed signal; and adjusting an oscillator frequency in accordance with said sum.
Claim 20
Independent Claim
97 words
A method for calibrating an oscillator to a reference frequency in a time base generator, wherein said steps include: enabling detection of an oscillator signal; enabling detection of a reference signal set by a user; detecting a first occurrence of either said oscillator signal or said reference signal at a control block; providing a digital signal that corresponds to said first occurrence; converting said digital signal into an analog signal; receiving a control current; adding said analog signal to said control current, thereby producing a summed signal; and adjusting an oscillator frequency in accordance with said sum.
Claim 21
Independent Claim
196 words
A method for calibrating an oscillator to a reference frequency in a time base generator, wherein said steps include: enabling detection of an oscillator signal; enabling detection of a reference signal; detecting a first occurrence of either said oscillator signal or said reference signal at a control block; providing a digital signal that corresponds to said first occurrence; converting said digital signal into an analog signal; receiving a control current; adding said analog signal to said control current, thereby producing a summed signal; adjusting an oscillator frequency in accordance with said sum; asserting a leading bit in said digital signal and deasserting all remaining bits in a first cycle; maintaining said leading bit asserted if said oscillator signal lags said reference signal and deasserting said leading bit if said oscillator signal leads said reference signal; providing a subsequent cycle for each of said remaining bits in said digital signal, wherein each subsequent leading bit of said remaining bits in asserted and all subsequent remaining bits remain deasserted; and maintaining said leading remaining bit asserted if said oscillator signal lags said reference signal and deasserting said leading remaining bit if said oscillator signal leads said reference signal.
Claim 22
Independent Claim
196 words
A method for calibrating an oscillator to a reference frequency in a time base generator, wherein said steps include: enabling detection of an oscillator signal; enabling detection of a reference signal; detecting a first occurrence of either said oscillator signal or said reference signal at a control block; providing a digital signal that corresponds to said first occurrence; converting said digital signal into an analog signal; receiving a control current; adding said analog signal to said control current, thereby producing a summed signal; adjusting an oscillator frequency in accordance with said sum; asserting a leading bit in said digital signal and deasserting all remaining bits in a first cycle; maintaining said leading bit asserted if said oscillator signal lags said reference signal and deasserting said leading bit if said oscillator signal leads said reference signal; providing a subsequent cycle for each of said remaining bits in said digital signal, wherein each subsequent leading bit of said remaining bits in asserted and all subsequent remaining bits remain deasserted; and maintaining said leading remaining bit asserted if said oscillator signal lags said reference signal and deasserting said leading remaining bit if said oscillator signal leads said reference signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-05-16 | 2003-11-15 | 2004-05-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-05-16 | 2007-11-15 | 2008-05-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-05-16 | 2011-11-15 | 2012-05-16 | $7700.00 | Window Closed / Lapsed |