Heterojunction field effect transistor
Abstract
Abstract A heterojunction field effect transistor realizing a high performance by a significant decrease. in source resistance while maintaining a sufficiently high gate resistivity to voltage is provided. Sequentially stacked on a c-face sapphire substrate via a buffer layer are an undoped GaN layer, undoped Al 0 .3 Ga 07 N layer, undoped GaN channel layer, undoped Al 0 .15 Ga 0 .85 N spacer layer, n-type Al 0 .15 Ga 0 .85 N electron supply layer, graded undoped Al z Ga 1-z N barrier layer and n-type Al 0 .06 Ga 0 .94 N contact layer, and a gate electrode, source electrode and drain electrode are formed on the n-type Al 0 .06 Ga 0 .94 N contact layer to form a AlGaN/GaN HEMT. The Al composition z in the graded undoped Al z Ga 1-z N barrier layer continuously decreases from 0.15 to 0.06, for example, from the n-type Al 0 .15 Ga 0 .85 N electron supply layer toward the n-type Al 0 .06 Ga 0 .94 N contact layer. An n ++ -type GaN contact layer may be formed on the n-type Al 0 .06 Ga 0 .94 N contact layer in the region for the source electrode and the drain electrode, and the source electrode and the drain may be formed on it.
Inventors
- 👤 Hiroji Kawai
- 👤 Shunji Imanaga
- 👤 Toshimasa Kobayashi
Bibliographic Details
Claims Analysis
Total Claims: 10References Cited (Backward Citations)
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