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US6061264A Expired / Lapsed US ⏱️ 0.0 years remaining

Self-aligned fuse structure and method with anti-reflective coating

Assignee: Avago Technologies International Sales Pte Ltd
•
Filing: 1998-07-17
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Granted: 2000-05-09
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Expires: 2018-07-17
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Abstract

Abstract Provided are a self-aligned semiconductor fuse structure, a method of making such a fuse structure, and apparatuses incorporating such a fuse structure. The fuse break point, that point at which the electrical link of which the fuse is part is severed by a laser beam, is self-aligned by the use of photolithography and an anti-reflective coating. The self-alignment allows the size and location of the break point to be less sensitive to the laser beam size and alignment. This has several advantages, including allowing photolithographic control and effective size reduction of the laser spot irradiating the fuse material and surrounding structure. This permits reduced fuse pitch, increasing density and the efficiency of use of chip area, and results in reduced thermal exposure, which causes less damage to chip. In addition, laser alignment is less critical and therefore less time-consuming, which increases throughput in fabrication.

Inventors

  • 👤 Gary K. Giust
  • 👤 Ruggero Castagnetti
  • 👤 Yauh-Ching Liu
  • 👤 Subramanian Ramesh

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 08:59
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 50 words
A semiconductor device fuse, comprising: a fuse material; a dielectric material disposed on a portion of said fuse material, said dielectric material having a thickness over a portion of the fuse material such that reflectance of incident laser light from said dielectric is less than that from the fuse material.
Claim 2
Dependent Claim 50 words
A semiconductor device fuse, comprising: a fuse material; a dielectric material disposed on a portion of said fuse material, said dielectric material having a thickness over a portion of the fuse material such that reflectance of incident laser light from said dielectric is less than that from the fuse material.
Claim 3
Dependent Claim 25 words
The fuse of claim 1, wherein the thickness of said dielectric is such that the reflectance of incident laser light from said dielectric is minimized.
Claim 4
Dependent Claim 11 words
The fuse of claim 1, wherein said fuse material comprises polysilicon.
Claim 5
Dependent Claim 12 words
The fuse of claim 1, wherein said fuse material comprises a metal.
Claim 6
Dependent Claim 16 words
The fuse of claim 4, wherein said metal is one of Al, AlCu, Cu and W.
Claim 7
Dependent Claim 33 words
The fuse of claim 1, wherein said dielectric comprises at least one of SiO 2 , Si 3 N 4 , SiO x N y (H z ), CaF 2 , and polyimide.
Claim 8
Dependent Claim 12 words
The fuse of claim 6, wherein said dielectric is SiO 2 .
Claim 9
Dependent Claim 13 words
The fuse of claim 1, wherein said semiconductor device comprises a stand-alone memory.
Claim 10
Dependent Claim 13 words
The fuse of claim 1, wherein said semiconductor device comprises an embedded memory.
Claim 11
Dependent Claim 74 words
A semiconductor memory, comprising: a plurality of rows and columns; a semiconductor device fuse in electrical connection with at least one of said rows and columns, said fuse having, a fuse material; a dielectric material disposed on a portion of said fuse material, said dielectric material having a thickness over a portion of the fuse material such that reflectance of incident laser light from said dielectric is less than that from the fuse material.
Claim 12
Dependent Claim 74 words
A semiconductor memory, comprising: a plurality of rows and columns; a semiconductor device fuse in electrical connection with at least one of said rows and columns, said fuse having, a fuse material; a dielectric material disposed on a portion of said fuse material, said dielectric material having a thickness over a portion of the fuse material such that reflectance of incident laser light from said dielectric is less than that from the fuse material.
Claim 13
Dependent Claim 13 words
The semiconductor memory of claim 10, wherein said memory comprises a DRAM cell.
Claim 14
Dependent Claim 13 words
The semiconductor memory of claim 10, wherein said memory comprises a SRAM cell.
Claim 15
Dependent Claim 13 words
The semiconductor memory of claim 10, wherein said memory comprises a EEPROM cell.
Claim 16
Dependent Claim 13 words
The semiconductor memory of claim 10, wherein said memory comprises a FLASH cell.
Claim 17
Dependent Claim 96 words
A semiconductor memory device, comprising: a memory array; a plurality of metal layers overlaying said memory array, at least one of said metal layers providing electrical connections to said array; a semiconductor device fuse in at least one of said metal layers providing electrical connections to said array, said fuse having, a fuse material; a dielectric material disposed on a portion of said fuse material, said dielectric material having a thickness over a portion of the fuse material such that reflectance of incident laser light from said dielectric is less than that from the fuse material.
Claim 18
Dependent Claim 96 words
A semiconductor memory device, comprising: a memory array; a plurality of metal layers overlaying said memory array, at least one of said metal layers providing electrical connections to said array; a semiconductor device fuse in at least one of said metal layers providing electrical connections to said array, said fuse having, a fuse material; a dielectric material disposed on a portion of said fuse material, said dielectric material having a thickness over a portion of the fuse material such that reflectance of incident laser light from said dielectric is less than that from the fuse material.
Claim 19
Dependent Claim 18 words
The semiconductor memory device of claim 15, wherein said semiconductor memory device is an application specific integrated circuit.

References Cited (Backward Citations)

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US5313701A Cited
US5241212A Cited
US5673028A Cited
US5622892A Cited
US5550399A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-05-09 2003-11-08 2004-05-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-05-09 2007-11-08 2008-05-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-05-09 2011-11-08 2012-05-09 $7700.00 Window Closed / Lapsed

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