US5854510A
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Low power programmable fuse structures
Assignee: VLSL TECHNOLOGY Inc
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Filing: 1997-06-26
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Granted: 1998-12-29
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Expires: 2017-06-26
Abstract
Abstract Disclosed is a semiconductor fuse structure having a low power programming threshold and anti-reverse engineering characteristics. The fuse structure includes a substrate having a field oxide region. A polysilicon strip that has an increased dopant concentration region lies over the field oxide region. The fuse structure further includes a silicided metallization layer having first and second regions lying over the polysilicon strip. The first region has a first thickness, and the second region has a second thickness that is less than the first thickness and is positioned substantially over the increased dopant concentration region of the polysilicon strip. Preferably, the first region of the silicided metallization layer has a first side and a second side located on opposite sides of the second region, and the resulting fuse structure is substantially rectangular in shape. Therefore, the semiconductor fuse structure can be programmed by breaking the second region.
Inventors
- 👤 Harlan Lee Sur, Jr.
- 👤 Subhas Bothra
- 👤 Xi-Wei Lin
- 👤 Martin H. Manley
- 👤 Robert Payne
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 15:51
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
98 words
A semiconductor fuse structure having a low power programming threshold, comprising: a substrate having a field oxide region; a polysilicon strip lying over the field oxide region and including an increased dopant concentration region; and a silicided metallization layer having first and second regions lying over the polysilicon strip, the first region has a first thickness, and the second region has a second thickness that is less than the first thickness and is positioned substantially over the increased dopant concentration region of the polysilicon strip; wherein the semiconductor fuse structure can be programmed by breaking the second region.
Claim 2
Dependent Claim
98 words
A semiconductor fuse structure having a low power programming threshold, comprising: a substrate having a field oxide region; a polysilicon strip lying over the field oxide region and including an increased dopant concentration region; and a silicided metallization layer having first and second regions lying over the polysilicon strip, the first region has a first thickness, and the second region has a second thickness that is less than the first thickness and is positioned substantially over the increased dopant concentration region of the polysilicon strip; wherein the semiconductor fuse structure can be programmed by breaking the second region.
Claim 3
Dependent Claim
40 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 1, wherein the first region of the silicided metallization layer has a first side and a second side located on opposite sides of the second region.
Claim 4
Dependent Claim
24 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 2, wherein the polysilicon strip is substantially rectangular in shape.
Claim 5
Dependent Claim
52 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 3, wherein the polysilicon strip has a thickness of between about 1,500 angstroms and about 2,500 angstroms, and has a dopant concentration of between about 1×10 19 atoms cm -3 and about 1×10 20 atoms cm -3 .
Claim 6
Dependent Claim
37 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 4, wherein the increased dopant concentration region is between about 3×10 20 atoms cm -3 and about 1×10 21 atoms cm -3 .
Claim 7
Dependent Claim
31 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 4, wherein the second thickness is about half of the first thickness of the silicided metallization layer.
Claim 8
Dependent Claim
50 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 6, wherein the first thickness of the silicided metallization layer is between about 350 angstroms and about 650 angstroms, and the second thickness of the silicided metallization is between about 175 angstroms and about 325 angstroms.
Claim 9
Dependent Claim
40 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 6, wherein the first thickness of the silicided metallization layer is about 500 angstroms, and the second thickness of the silicided metallization is about 250 angstroms.
Claim 10
Dependent Claim
36 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 3, wherein the substantially rectangular shape of the polysilicon strip has a long dimension that is about five times a short dimension.
Claim 11
Dependent Claim
28 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 9, wherein the short dimension is between about 1,500 angstroms and about 5,000 angstroms.
Claim 12
Dependent Claim
23 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 9, wherein the short dimension is about 2,500 angstroms.
Claim 13
Dependent Claim
23 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 11, wherein the long dimension is about 12,500 angstroms.
Claim 14
Dependent Claim
34 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 10, wherein the second region of the silicided metallization layer is substantially square having sides equal to the short dimension.
Claim 15
Dependent Claim
42 words
A semiconductor fuse structure having a low power programming threshold as recited in claim 13, wherein conductive vias are coupled to a first end and a second end the silicided metallization layer for causing the programming break in the semiconductor fuse structure.
Claim 16
Dependent Claim
82 words
A bi-layer semiconductor fuse structure, comprising: a substrate having a field oxide region; a polysilicon strip lying over the field oxide region; and a silicided metallization layer having first and second regions lying over the polysilicon strip, the first region has a first thickness that is approximately centered about the polysilicon strip, and the second region has a second thickness that is about twice that of the first thickness, and the second region is positioned on adjacent sides of the first region.
Claim 17
Dependent Claim
82 words
A bi-layer semiconductor fuse structure, comprising: a substrate having a field oxide region; a polysilicon strip lying over the field oxide region; and a silicided metallization layer having first and second regions lying over the polysilicon strip, the first region has a first thickness that is approximately centered about the polysilicon strip, and the second region has a second thickness that is about twice that of the first thickness, and the second region is positioned on adjacent sides of the first region.
Claim 18
Dependent Claim
25 words
A bi-layer semiconductor fuse structure as recited in claim 15, wherein the polysilicon strip is a doped polysilicon strip that is substantially rectangular in shape.
Claim 19
Dependent Claim
32 words
A bi-layer semiconductor fuse structure as recited in claim 16, wherein the substantially rectangular shape of the doped polysilicon strip has a long dimension that is about five times a short dimension.
Claim 20
Dependent Claim
23 words
A bi-layer semiconductor fuse structure as recited in claim 17, wherein the short dimension is between about 1,500 angstroms and about 5,000 angstroms.
Claim 21
Dependent Claim
70 words
A bi-layer semiconductor fuse structure, comprising: a polysilicon strip; and a silicided metallization layer having first and second regions lying over the polysilicon strip, the first region has a first thickness that is approximately centered about the polysilicon strip, and the second region has a second thickness that is about twice as thick as the first thickness, and the second region is positioned on adjacent sides of the first region.
Claim 22
Dependent Claim
70 words
A bi-layer semiconductor fuse structure, comprising: a polysilicon strip; and a silicided metallization layer having first and second regions lying over the polysilicon strip, the first region has a first thickness that is approximately centered about the polysilicon strip, and the second region has a second thickness that is about twice as thick as the first thickness, and the second region is positioned on adjacent sides of the first region.
Claim 23
Dependent Claim
19 words
A bi-layer semiconductor fuse structure as recited in claim 19, wherein the polysilicon strip is a doped polysilicon strip.
Claim 24
Dependent Claim
32 words
A bi-layer semiconductor fuse structure as recited in claim 20, wherein the doped polysilicon strip has a long dimension that is about five times a short dimension of the doped polysilicon strip.
Claim 25
Dependent Claim
23 words
A bi-layer semiconductor fuse structure as recited in claim 21, wherein the short dimension is between about 1,500 angstroms and about 5,000 angstroms.
Claim 26
Dependent Claim
46 words
A bi-layer semiconductor fuse structure as recited in claims 19, wherein the second thickness of the silicided metallization layer is between about 350 angstroms and about 650 angstroms, and the first thickness of the silicided metallization layer is between about 175 angstroms and about 325 angstroms.
Claim 27
Dependent Claim
87 words
A bi-layer semiconductor fuse structure, comprising: a polysilicon strip; and a silicided metallization layer having first and second regions lying over the polysilicon strip, the first region has a first thickness that is approximately centered about the polysilicon strip, the second region has a second thickness that is between about 350 angstroms and about 650 angstroms, and the first thickness of the silicided metallization layer is between about 175 angstroms and about 325 angstroms, and the second region is positioned on adjacent sides of the first region.
Claim 28
Dependent Claim
87 words
A bi-layer semiconductor fuse structure, comprising: a polysilicon strip; and a silicided metallization layer having first and second regions lying over the polysilicon strip, the first region has a first thickness that is approximately centered about the polysilicon strip, the second region has a second thickness that is between about 350 angstroms and about 650 angstroms, and the first thickness of the silicided metallization layer is between about 175 angstroms and about 325 angstroms, and the second region is positioned on adjacent sides of the first region.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2001-12-28 | 2002-06-29 | 2002-12-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-12-28 | 2006-06-29 | 2006-12-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-12-28 | 2010-06-29 | 2010-12-29 | $7700.00 | Window Closed / Lapsed |