Method and apparatus for voltage regulation in multi-output switched mode power supplies

Claim 2

A step-down switched-mode power supply circuit, comprising: a transformer having at least one primary winding and at least one secondary winding; a current sensing device for sensing a current through a primary winding of the transformer; a first switch and a second switch; a first comparator for determining if the current through said current sensing device exceeds a threshold; a voltage regulator coupled to the secondary winding to produce a regulated voltage on an output line; a second comparator coupled to said output line of said voltage regulator for determining if the regulated voltage has drooped below an acceptable level; a counter coupled to the second comparator for asserting a power save disable signal for a fixed number of switch cycles when said second comparator determines that the regulated voltage has drooped below said acceptable level; and control circuitry for generating a pair of complimentary signals controlling the first switch and the second switch, said control circuitry responsive to the first comparator to enter a power saving mode disabling the complimentary signals, and to the power save disable signal to temporarily exit the power saving mode while the power save disable signal is asserted.

Claim 3

A circuit in accordance with claim 1, wherein said current sensing device include s a resistor in series with said primary winding.

Claim 4

A circuit in accordance with claim 2, wherein said current sensing device includes an operational amplifier to provide a voltage signal indicative of said current through said primary winding.

Claim 5

A circuit in accordance with claim 1, wherein said voltage regulator is coupled to said secondary winding with a rectifier.

Claim 6

A circuit in accordance with claim 4, wherein said rectifier includes a diode.

Claim 7

A circuit in accordance with claim 1, wherein said voltage regulator is a linear voltage regulator.

Claim 8

A step-down switched-mode power supply circuit, comprising: a first voltage input node for receiving a first voltage level; a second voltage input node for receiving a second voltage level; a first switch and a second switch, said first switch connecting said first voltage node to a phase node when said first switch is active, said second switch connecting said second voltage node to said phase node when said second switch is active; a pulse width modulated synchronous switching control circuit generating a first switching signal and a second switching signal, said first switching signal and said second switching signal being complementary, said first switching signal controlling said first switch and said second switching signal controlling said second switch; a transformer having at least one primary winding and at least one secondary winding, said primary winding coupled to said phase node and to a current sensing device for sensing a current through a primary winding of the transformer; a first comparator for determining if the current through said current sensing device exceeds a threshold; a voltage regulator coupled to said secondary winding to produce a regulated voltage on an output line; a second comparator coupled to said output line of said voltage regulator for determining if the regulated voltage has drooped below an acceptable level; and a counter coupled to the second comparator for asserting a power save disable signal for a fixed number of switch cycles when said second comparator determines that the regulated voltage has drooped below said acceptable level; and said control circuit responsive to said first comparator to enter a power saving mode disabling said first switching signal and said second switching signal, and to the power save disable signal to temporarily exit the power saving mode while the power save disable signal is asserted.

Claim 9

A step-down switched-mode power supply circuit, comprising: a first voltage input node for receiving a first voltage level; a second voltage input node for receiving a second voltage level; a first switch and a second switch, said first switch connecting said first voltage node to a phase node when said first switch is active, said second switch connecting said second voltage node to said phase node when said second switch is active; a pulse width modulated synchronous switching control circuit generating a first switching signal and a second switching signal, said first switching signal and said second switching signal being complementary, said first switching signal controlling said first switch and said second switching signal controlling said second switch; a transformer having at least one primary winding and at least one secondary winding, said primary winding coupled to said phase node and to a current sensing device for sensing a current through a primary winding of the transformer; a first comparator for determining if the current through said current sensing device exceeds a threshold; a voltage regulator coupled to said secondary winding to produce a regulated voltage on an output line; a second comparator coupled to said output line of said voltage regulator for determining if the regulated voltage has drooped below an acceptable level; and a counter coupled to the second comparator for asserting a power save disable signal for a fixed number of switch cycles when said second comparator determines that the regulated voltage has drooped below said acceptable level; and said control circuit responsive to said first comparator to enter a power saving mode disabling said first switching signal and said second switching signal, and to the power save disable signal to temporarily exit the power saving mode while the power save disable signal is asserted.

Claim 10

A circuit in accordance with claim 7, wherein said current sensing device includes a resistor in series with said primary winding.

Claim 11

A circuit in accordance with claim 8, wherein said current sensing device includes an operational amplifier to provide a voltage signal indicative of said current through said primary winding.

Claim 12

A step-down switched-mode power supply circuit, comprising: a first voltage input node for receiving a first voltage level; a second voltage input node for receiving a second voltage level; a first switch and a second switch, said first switch connecting said first voltage node to a phase node when said first switch is active, said second switch connecting said second voltage node to said phase node when said second switch is active; a pulse width modulated switching control circuit generating a switching signal, said switching signal controlling said first switch; a transformer having at least one primary winding and at least one secondary winding, said primary winding coupled to said phase node and to a current sensing device for sensing a current through a primary winding of the transformer; a first comparator for determining if the current through said current sensing device exceeds a threshold; a voltage regulator coupled to said secondary winding to produce a regulated voltage on an output line; a second comparator coupled to said output line of said voltage regulator for determining if the regulated voltage has drooped below an acceptable level; and a counter coupled to the second comparator for asserting a power save disable signal for a fixed number of switch cycles when said second comparator determines that the regulated voltage has drooped below said acceptable level; and said control circuit responsive to said first comparator to enter a power saving mode disabling said switching signal, and to the power save disable signal to temporarily exit the power saving mode while the power save disable signal is asserted.

Claim 13

A step-down switched-mode power supply circuit, comprising: a first voltage input node for receiving a first voltage level; a second voltage input node for receiving a second voltage level; a first switch and a second switch, said first switch connecting said first voltage node to a phase node when said first switch is active, said second switch connecting said second voltage node to said phase node when said second switch is active; a pulse width modulated switching control circuit generating a switching signal, said switching signal controlling said first switch; a transformer having at least one primary winding and at least one secondary winding, said primary winding coupled to said phase node and to a current sensing device for sensing a current through a primary winding of the transformer; a first comparator for determining if the current through said current sensing device exceeds a threshold; a voltage regulator coupled to said secondary winding to produce a regulated voltage on an output line; a second comparator coupled to said output line of said voltage regulator for determining if the regulated voltage has drooped below an acceptable level; and a counter coupled to the second comparator for asserting a power save disable signal for a fixed number of switch cycles when said second comparator determines that the regulated voltage has drooped below said acceptable level; and said control circuit responsive to said first comparator to enter a power saving mode disabling said switching signal, and to the power save disable signal to temporarily exit the power saving mode while the power save disable signal is asserted.

Claim 14

A circuit in accordance with claim 10, wherein said second switch is a diode.

Claim 15

A circuit in accordance with claim 10, wherein said second switch is a transistor connected to form a diode.

Claim 20

A method in accordance with claim 14, wherein said restarting further includes: causing a counter to count for a fixed number of cycles; strobing the counter with a switching signal tracking at least one switching signal applied to at least one of the first switch and the second switch; and asserting a power save disable signal while said counter is counting.

Claim 21

A method in accordance with claim 15, wherein said causing a counter to count includes loading a value into the counter and allowing it to count down to zero.

Claim 22

A method in accordance with claim 15, wherein said causing a counter to count includes zeroing the counter and allowing it to count to a predetermined value other than zero.