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US6028362A Expired / Lapsed US ⏱️ 0.0 years remaining

Damascene wiring with flat surface

Assignee: Yamaha Corp
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Filing: 1998-05-11
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Granted: 2000-02-22
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Expires: 2018-05-11
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Abstract

Abstract A method of fabricating a semiconductor device includes the steps of: providing a substrate having an insulating layer thereon; forming a connection hole including a first sub-hole and a second sub-hole mutually connected in the insulating layer, wherein the first sub-hole has a first diameter and the second sub-hole has a second diameter larger than the first diameter; forming a first conductive layer over the substrate; removing the first conductive layer to a thickness so as to form a side wall spacer film on a side wall of the second sub-hole and a plug film in the first sub-hole; forming a barrier metal layer over the substrate to cover the side wall spacer and the plug film; forming a second conductive layer over the substrate to fill space in the connection hole; and chemical mechanical polishing the second conductive layer.

Inventors

  • 👤 Masayoshi Omura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 17:56
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/052; H10W20/0526; H10W20/033; H10W20/036; H10W20/037; H10W20/056; H10W20/0595; H10W20/071; H10W20/081; H10W20/084; H10W20/087; H10W20/40; H10W20/41; H10W20/425; H10W20/0882

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 145 words
A semiconductor device comprising: a) a substrate; b) an insulating layer formed on the substrate and having a connection hole including a first sub-hole and a second sub-hole mutually connected in the insulating layer, wherein the first sub-hole has a first diameter and the second sub-hole has a second diameter larger than the first diameter; c) a first conductive layer formed in and covering a side surface of the first sub-hole, wherein the first conductive layer has a hole therein; d) a second conductive layer formed on and covering a side wall of the second sub-hole and having a tapered side surface; e) a barrier metal layer formed over the connection hole on the substrate to continuously cover the first and second conductive layers; and f) a third conductive layer formed over the barrier metal layer to provide a damascene structure in the connection hole.
Claim 2
Dependent Claim 145 words
A semiconductor device comprising: a) a substrate; b) an insulating layer formed on the substrate and having a connection hole including a first sub-hole and a second sub-hole mutually connected in the insulating layer, wherein the first sub-hole has a first diameter and the second sub-hole has a second diameter larger than the first diameter; c) a first conductive layer formed in and covering a side surface of the first sub-hole, wherein the first conductive layer has a hole therein; d) a second conductive layer formed on and covering a side wall of the second sub-hole and having a tapered side surface; e) a barrier metal layer formed over the connection hole on the substrate to continuously cover the first and second conductive layers; and f) a third conductive layer formed over the barrier metal layer to provide a damascene structure in the connection hole.
Claim 3
Dependent Claim 25 words
A semiconductor device according to claim 1, wherein the third conductive layer is flush or coplanar with a planarized upper surface of the insulating layer.
Claim 4
Dependent Claim 45 words
A semiconductor device according to claim 1, further comprising a cap layer formed on the third conductive layer, the cap layer, the third conductive layer and the insulating layer have planarized surfaces, and the cap layer and the insulating layer are coplanar with each other.
Claim 5
Dependent Claim 22 words
A semiconductor device according to claim 3, wherein the first and second conductive layers comprise a refractory metal, aluminum, nickel or copper.
Claim 6
Dependent Claim 22 words
A semiconductor device according to claim 3, wherein the third conductive layer is formed of aluminum, aluminum alloy, copper or copper alloy.
Claim 7
Dependent Claim 25 words
A semiconductor device according to claim 5, wherein said cap layer is formed of refractory metal alloy, metal silicide or lamination of different conductive materials.
Claim 8
Dependent Claim 20 words
A semiconductor device according to claim 1, wherein said barrier metal layer fills the hole in the first conductive layer.
Claim 9
Dependent Claim 26 words
A semiconductor device according to claim 1, wherein said first and second conductive layers each comprise a lower conductive adhesive layer and an upper conductive layer.
Claim 10
Dependent Claim 29 words
A semiconductor device according to claim 8, wherein said barrier metal layer covers surfaces of said first and second conductive layers and the insulating layer in the connection hole.
Claim 11
Dependent Claim 20 words
A semiconductor device according to claim 9, wherein said barrier metal layer fills the hole in the first conductive layer.
Claim 12
Dependent Claim 23 words
A semiconductor device according to claim 10, wherein said third conductive layer has a surface recessed form top surface of said insulating layer.
Claim 13
Dependent Claim 33 words
A semiconductor device according to claim 11, further comprising a cap conductive layer formed on said third conductive layer and having a top surface flush with the top surface of said insulating layer.

References Cited (Backward Citations)

US5173442A Cited
US5262354A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-02-21 2003-08-23 2004-02-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-02-21 2007-08-23 2008-02-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-02-21 2011-08-23 2012-02-22 $7700.00 Window Closed / Lapsed

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