US6016264A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Antifuse programming and detecting circuit
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1998-05-26
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Granted: 2000-01-18
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Expires: 2018-05-26
Abstract
Abstract An antifuse programming and detecting circuit has an antifuse which is capable of being programmed to an open state or to a short state. The circuit includes a latch circuit coupled with a power supply; a programming circuit for setting the antifuse state; and a reset circuit for resetting the output signal. The latch circuit provides and latches an output signal by detecting an antifuse state. Therefore, the state of the antifuse can be programmed, identified, and latched by the circuit design in the invention. The programming and detecting operations of the circuit provides programming, current limiting, detecting, and latching functions with simplified design and reduced number of devices.
Inventors
- 👤 Ming-Zen Lin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 04:39
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/18; G11C7/00; G11C7/06; G11C7/065
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
135 words
An antifuse programming and detecting circuit comprising: an antifuse being programmable at an open state or a short state; a latch circuit coupled with a power supply, said latch circuit providing and latching an output signal by detecting an antifuse state, said latch circuit comprising a first transistor, a second transistor, and a third transistor, said first transistor and said second transistor being cross-coupled with sources coupled to said power supply and with gates cross-coupled to drains, said drain of said first transistor being coupled to said antifuse, said third transistor having two terminals coupled between said drain of said second transistor and a ground connection, and having a gate coupled to said drain of said first transistor; a programming circuit for setting said antifuse state; and a reset circuit for resetting said output signal.
Claim 2
Dependent Claim
135 words
An antifuse programming and detecting circuit comprising: an antifuse being programmable at an open state or a short state; a latch circuit coupled with a power supply, said latch circuit providing and latching an output signal by detecting an antifuse state, said latch circuit comprising a first transistor, a second transistor, and a third transistor, said first transistor and said second transistor being cross-coupled with sources coupled to said power supply and with gates cross-coupled to drains, said drain of said first transistor being coupled to said antifuse, said third transistor having two terminals coupled between said drain of said second transistor and a ground connection, and having a gate coupled to said drain of said first transistor; a programming circuit for setting said antifuse state; and a reset circuit for resetting said output signal.
Claim 3
Dependent Claim
16 words
The antifuse programming and detecting circuit of claim 1, wherein said antifuse is a capacitive element.
Claim 4
Dependent Claim
26 words
The apparatus of claim 1, wherein said latch circuit serves as a current limiting circuit when said programming circuit sets said antifuse at said short state.
Claim 5
Dependent Claim
22 words
The antifuse programming and detecting circuit of claim 2, wherein said capacitive element can be broken down to set said short state.
Claim 6
Dependent Claim
17 words
The antifuse programming and detecting circuit of claim 1, wherein said power supply is a voltage source.
Claim 7
Dependent Claim
37 words
The antifuse programming and detecting circuit of claim 1, wherein said programming circuit comprises a first transistor with two terminals coupled between said antifuse and a ground connection, and with its gate coupled to an addressing signal.
Claim 8
Dependent Claim
35 words
The antifuse programming and detecting circuit of claim 1, wherein said programming circuit further comprises a second transistor with a gate coupled to said addressing signal for controlling said ground connection to said latch circuit.
Claim 9
Dependent Claim
41 words
The antifuse programming and detecting circuit of claim 1, wherein said reset circuit comprises a transistor with two terminals coupled between a node of said output signal and a ground connection, and with a gate being coupled to a reset signal.
Claim 10
Dependent Claim
135 words
An antifuse programming and detecting circuit comprising: an antifuse being programmable at an open state or a short state; a latch circuit coupled with a power supply, said latch circuit providing and latching an output signal by detecting an antifuse state, said latch circuit comprising a first transistor, a second transistor, and a third transistor, said first transistor and said second transistor being cross-coupled with sources coupled to said power supply and with gates cross-coupled to drains, said drain of said first transistor being coupled to said antifuse, said third transistor having two terminals coupled between said drain of said second transistor and a ground connection, and having a gate coupled to said drain of said first transistor; a programming circuit for setting said antifuse state; and a reset circuit for resetting said output signal.
Claim 11
Dependent Claim
135 words
An antifuse programming and detecting circuit comprising: an antifuse being programmable at an open state or a short state; a latch circuit coupled with a power supply, said latch circuit providing and latching an output signal by detecting an antifuse state, said latch circuit comprising a first transistor, a second transistor, and a third transistor, said first transistor and said second transistor being cross-coupled with sources coupled to said power supply and with gates cross-coupled to drains, said drain of said first transistor being coupled to said antifuse, said third transistor having two terminals coupled between said drain of said second transistor and a ground connection, and having a gate coupled to said drain of said first transistor; a programming circuit for setting said antifuse state; and a reset circuit for resetting said output signal.
Claim 12
Dependent Claim
26 words
The antifuse programming and detecting circuit of claim 9, wherein said antifuse is a capacitive element which can be broken down to set said short state.
Claim 13
Dependent Claim
30 words
The antifuse programming and detecting circuit of claim 9, wherein said latch circuit serves as a current limiting circuit when said programming circuit sets said antifuse at said short state.
Claim 14
Dependent Claim
17 words
The antifuse programming and detecting circuit of claim 9, wherein said power supply is a voltage source.
Claim 15
Dependent Claim
37 words
The antifuse programming and detecting circuit of claim 9, wherein said programming circuit comprises a first transistor with two terminals coupled between said antifuse and said ground connection, and with its gate coupled to an addressing signal.
Claim 16
Dependent Claim
35 words
The antifuse programming and detecting circuit of claim 13, wherein said programming circuit further comprises a second transistor with a gate coupled to said addressing signal for controlling said ground connection to said latch circuit.
Claim 17
Dependent Claim
41 words
The antifuse programming and detecting circuit of claim 9, wherein said reset circuit comprises a transistor with two terminals coupled between a node of said output signal and a ground connection, and with a gate being coupled to a reset signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-01-17 | 2003-07-19 | 2004-01-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-01-17 | 2007-07-19 | 2008-01-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-01-17 | 2011-07-19 | 2012-01-18 | $7700.00 | Window Closed / Lapsed |