Method for fabricating a semiconductor memory device

Claim 1

A method for fabricating a semiconductor memory device comprising the steps of: forming a source region and a drain region in a semiconductor substrate; etching an area to be an element isolation region of said semiconductor substrate so as to form a trench, with a remainder of said substrate defining an element forming area containing the source and drain regions; embedding an insulating film in said trench to form an element isolation region which has a surface generally equal to, or a little higher than, a surface of said element forming area of the semiconductor substrate; forming a first insulating film on at least said element forming area of said semiconductor substrate isolated by said element isolation region; forming a floating gate electrode having a uniform thickness on said first insulating film and overlying a part of the element isolation region; forming a second insulating film on said floating gate electrode; forming a control gate electrode on said second insulating film; forming a third insulating film to be a tunneling insulating film on a side of said floating gate electrode; and forming an erasing gate electrode on the element isolation region and simultaneously forming wiring for a peripheral circuit, said wiring being made from a same material as the erasing gate electrode, said erasing gate electrode covering said third insulating film, a bottom of the erasing gate electrode being located on a level same as the surface of said element forming area of the semiconductor substrate surface.

Claim 2

A method for fabricating a semiconductor memory device comprising the steps of: forming a source region and a drain region in a semiconductor substrate; etching an area to be an element isolation region of said semiconductor substrate so as to form a trench, with a remainder of said substrate defining an element forming area containing the source and drain regions; embedding an insulating film in said trench to form an element isolation region which has a surface generally equal to, or a little higher than, a surface of said element forming area of the semiconductor substrate; forming a first insulating film on at least said element forming area of said semiconductor substrate isolated by said element isolation region; forming a floating gate electrode having a uniform thickness on said first insulating film and overlying a part of the element isolation region; forming a second insulating film on said floating gate electrode; forming a control gate electrode on said second insulating film; forming a third insulating film to be a tunneling insulating film on a side of said floating gate electrode; and forming an erasing gate electrode on the element isolation region and simultaneously forming wiring for a peripheral circuit, said wiring being made from a same material as the erasing gate electrode, said erasing gate electrode covering said third insulating film, a bottom of the erasing gate electrode being located on a level same as the surface of said element forming area of the semiconductor substrate surface.

Claim 9

A method for fabricating a semiconductor device comprising the steps of: forming a first insulating film to be an element isolation film on a semiconductor substrate; etching said first insulating film so as to remove a portion thereof and expose a portion of the substrate, a remaining portion of said first insulating film forming the element isolation film; forming an epitaxial layer by a selective epitaxy method on a surface of the semiconductor substrate that was exposed by said step of etching such that said epitaxial layer has a surface at a level generally equal to a level of the element isolation film; forming a source region and a drain region in said epitaxial layer; forming a second insulating film at least on said epitaxial layer; forming a floating gate electrode on said second insulating film; forming a third insulating film on a portion of said floating gate electrode; forming a control gate electrode on said third insulating film; forming a fourth insulating film to be a tunneling insulation film on a side of said floating gate electrode; and forming an erasing gate electrode so as to cover said fourth insulating film.

Claim 10

A method for fabricating a semiconductor device comprising the steps of: forming a first insulating film to be an element isolation film on a semiconductor substrate; etching said first insulating film so as to remove a portion thereof and expose a portion of the substrate, a remaining portion of said first insulating film forming the element isolation film; forming an epitaxial layer by a selective epitaxy method on a surface of the semiconductor substrate that was exposed by said step of etching such that said epitaxial layer has a surface at a level generally equal to a level of the element isolation film; forming a source region and a drain region in said epitaxial layer; forming a second insulating film at least on said epitaxial layer; forming a floating gate electrode on said second insulating film; forming a third insulating film on a portion of said floating gate electrode; forming a control gate electrode on said third insulating film; forming a fourth insulating film to be a tunneling insulation film on a side of said floating gate electrode; and forming an erasing gate electrode so as to cover said fourth insulating film.