MOSFETs with recessed self-aligned silicide gradual S/D junction

Claim 1

A structure of a transistor with recessed self-aligned silicide gradual source and drain junctions on a semiconductor substrate, the structure including: a gate oxide formed on said semiconductor substrate; a gate formed on said gate oxide, said gate having undercut portions formed under said gate, wherein said semiconductor substrate has recess portions adjacent to said gate; a silicon oxynitride layer conformally formed on a surface of said gate and refilled into said undercut portions to be used as a portion of said gate oxide to enhance hot carrier immunity; side wall spacers formed on said side walls of said gate and on a portion of said silicon oxynitride layer, said silicon oxynitride layer being between said gate and said side wall spacers; a polycide layer formed at a top of said gate to reduce the electrical resistance; recessed source and drain (S/D) regions formed in said recess portions; lightly doped drain (LDD) structures formed in said semiconductor substrate adjacent to said gate and under said gate oxide; extended source and drain SID gradually formed between said source and drain and said LDD structure to suppress the short channel effect, wherein said LDD structure is higher than said extended S/D, and said extended S/D is higher than said S/D regions, thereby forming recessed gradual source and drain junctions; and self-aligned silicide (SALICIDE) layers formed at a top of said source and drain to reduce the electrical resistance.