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US5994177A Expired / Lapsed US ⏱️ 0.0 years remaining

Dynamic threshold MOSFET using accumulated base BJT level shifter for low voltage sub-quarter micron transistor

Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1999-02-05
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Granted: 1999-11-30
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Expires: 2019-02-05
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Abstract

Abstract A dynamic threshold voltage MOSFET to provide increase drain-to-source saturation current (IDSsat) and lower off current (Ioff) is described. The dynamic threshold voltage MOSFET has a first diffusion-well of a material of a first conductivity type formed at the surface of the substrate to form a bulk region. A source region and a drain region of a material of a second conductivity type are diffused into the diffusion-well. A first gate is then placed on a first oxide surface above the substrate between the source and drain regions. An accumulated base bipolar transistor is then placed on the semiconductor substrate. The base of the accumulated base bipolar transistor is connected to the gate, the emitter is connected to the diffusion-well. A resistor is connected between the emitter of the accumulated base bipolar transistor and a substrate biasing voltage source. A biasing circuit connected to the collector of the accumulated base bipolar transistor to provide a bias voltage for the accumulated base bipolar transistor.

Inventors

  • 👤 Shyh-Chyi Wong
  • 👤 Mong-Song Liang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 20:32
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10D84/403; H10D86/00; H10D86/201

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 226 words
A method of forming a dynamic threshold voltage MOSFET on substrate comprising the steps of: forming a first diffusion-well of a material of a first conductivity type to form a bulk region of said dynamic threshold voltage MOSFET; forming a first source region and a first drain region distally separated within said first diffusion-well; forming a first gate on a first oxide on a surface of said first well between the source region and the drain region; forming a second diffusion-well of the material of the first type to form a base of an accumulated base bipolar transistor; forming a second source region and a second drain region distally separated and within the second diffusion-well to form respectively and a collector of the accumulated base bipolar transistor; forming a second gate on a second oxide surface above the surface of the second diffusion-well and between the second source region and the second drain region; connecting the second gate to the emitter of the accumulated base bipolar transistor; connecting the collector of the accumulated base bipolar transistor to a biasing voltage source; connecting the emitter of the accumulated base bipolar transistor to a resistor that is connected to a substrate biasing voltage source and to the bulk region formed by said first diffusion; and connecting the base of the accumulated base bipolar transistor to the first gate.
Claim 2
Independent Claim 226 words
A method of forming a dynamic threshold voltage MOSFET on substrate comprising the steps of: forming a first diffusion-well of a material of a first conductivity type to form a bulk region of said dynamic threshold voltage MOSFET; forming a first source region and a first drain region distally separated within said first diffusion-well; forming a first gate on a first oxide on a surface of said first well between the source region and the drain region; forming a second diffusion-well of the material of the first type to form a base of an accumulated base bipolar transistor; forming a second source region and a second drain region distally separated and within the second diffusion-well to form respectively and a collector of the accumulated base bipolar transistor; forming a second gate on a second oxide surface above the surface of the second diffusion-well and between the second source region and the second drain region; connecting the second gate to the emitter of the accumulated base bipolar transistor; connecting the collector of the accumulated base bipolar transistor to a biasing voltage source; connecting the emitter of the accumulated base bipolar transistor to a resistor that is connected to a substrate biasing voltage source and to the bulk region formed by said first diffusion; and connecting the base of the accumulated base bipolar transistor to the first gate.
Claim 3
Dependent Claim 12 words
The method of claim 1 wherein the substrate is a semiconductor substrate.
Claim 4
Dependent Claim 27 words
The method of claim 2 wherein forming the first diffusion-well and the second diffusion-well is diffusing the material of the first conductivity type into the semiconductor substrate.
Claim 5
Dependent Claim 11 words
The method of claim 1 wherein the substrate is an insulator.
Claim 6
Dependent Claim 38 words
The method of claim 4 wherein the method further comprises forming a semiconductor epitaxial layer of the material of the first conductivity type on the surface of the insulator into which the first and second diffusion-wells are formed.
Claim 7
Dependent Claim 59 words
The method of claim 1 wherein a voltage developed between the bulk region and the source region is increased as a voltage is applied between the first gate and the source region is increased thus increasing a drain-to-source saturation current of MOSFET formed by the bulk region, the first drain region, the first source region and the first gate.
Claim 8
Dependent Claim 20 words
The method of claim 6 wherein the accumulated base transistor occupies from 10% to 100% the area of the MOSFET.

References Cited (Backward Citations)

US5773331A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-11-29 2003-05-31 2003-11-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-11-29 2007-05-31 2007-11-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-11-29 2011-05-31 2011-11-30 $7700.00 Window Closed / Lapsed

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