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Fabrication process of a capacitor structure of semiconductor memory cell

Assignee: Sony Corp
•
Filing: 1998-12-21
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Granted: 1999-11-30
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Expires: 2018-12-21
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Abstract

Abstract A capacitor structure of a semiconductor memory cell such as a FERAM has an upper electrode less susceptible a damage even by heat-treatment in a hydrogen gas atmosphere. The capacitor structure includes a lower electrode, a capacitor thin film formed of a ferroelectric thin film formed on the lower electrode, and an upper electrode formed on the capacitor thin film. The upper electrode is made of Ru1-xOx (0.1<x<0.64).

Inventors

  • 👤 Nicolas Nagel
  • 👤 Kenji Katori

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 03:59
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10D1/694; H10B; H10B53/00; H10D1/682

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 72 words
A process of fabricating a capacitor structure of a semiconductor memory cell including a lower electrode, a capacitor thin film composed of a ferroelectric thin film formed on the lower electrode, and an upper electrode formed on the capacitor thin film, comprising the step of: forming, the upper electrode layer made from Ru 1-x O x where 0.1<x<0.64, on the ferroelectric thin film by sputtering, reactive sputtering, electron beam deposition, or MOCVD.
Claim 2
Dependent Claim 72 words
A process of fabricating a capacitor structure of a semiconductor memory cell including a lower electrode, a capacitor thin film composed of a ferroelectric thin film formed on the lower electrode, and an upper electrode formed on the capacitor thin film, comprising the step of: forming, the upper electrode layer made from Ru 1-x O x where 0.1<x<0.64, on the ferroelectric thin film by sputtering, reactive sputtering, electron beam deposition, or MOCVD.
Claim 3
Dependent Claim 47 words
A process of fabricating a capacitor structure of a semiconductor memory cell according to claim 1, further comprising the step of heat-treating the upper electrode layer formed by sputtering, reactive sputtering, electron beam deposition, or MOCVD, in an oxygen gas atmosphere at a temperature T° C. (T<625).
Claim 4
Dependent Claim 99 words
A process of fabricating a capacitor structure of a semiconductor memory cell including a lower electrode, a capacitor thin film composed of a ferroelectric thin film formed on the lower electrode, and an upper electrode formed on the capacitor thin film, comprising the steps of: forming a Ru layer on the ferroelectric thin film by sputtering, reactive sputtering, electron beam deposition, or MOCVD; and heat-treating the Ru layer in an oxygen gas atmosphere at a temperature T'° C. (575<T'<625); whereby the upper electrode layer made from Ru 1-x O x where 0.1<x<0.64 is formed on the ferroelectric thin film.
Claim 5
Dependent Claim 99 words
A process of fabricating a capacitor structure of a semiconductor memory cell including a lower electrode, a capacitor thin film composed of a ferroelectric thin film formed on the lower electrode, and an upper electrode formed on the capacitor thin film, comprising the steps of: forming a Ru layer on the ferroelectric thin film by sputtering, reactive sputtering, electron beam deposition, or MOCVD; and heat-treating the Ru layer in an oxygen gas atmosphere at a temperature T'° C. (575<T'<625); whereby the upper electrode layer made from Ru 1-x O x where 0.1<x<0.64 is formed on the ferroelectric thin film.
Claim 6
Dependent Claim 35 words
A process of fabricating a capacitor structure of a semiconductor memory cell according to claim 1, wherein the ferroelectric thin film is made from a ferroelectric material of a Bi based layer structure perovskite type.
Claim 7
Dependent Claim 53 words
A process of fabricating a capacitor structure of a semiconductor memory cell according to claim 1, wherein the ferroelectric thin film contains, as a main crystal phase, a crystal phase expressed by Bi X (Sr, Ca, Ba) Y (Ta z , Nb 1-z ) 2 O d where 1.7≦X≦2.5, 0.6≦Y≦1.2, 0≦Z≦1.0, and 8.0≦d≦10.0.
Claim 8
Dependent Claim 33 words
A process of fabricating a capacitor structure of a semiconductor memory cell according to claim 1, wherein the ferroelectric thin film is made from Pb(Zr 1-y , Ti y )O 3 where 0<y<1.
Claim 9
Dependent Claim 45 words
A process of fabricating a capacitor structure, comprising the steps of: forming a lower electrode on a substrate; forming a ferroelectric thin film on the lower electrode; and forming a thin film made from Ru 1-x O x where 0.1<x<0.64 on the ferroelectric thin film.
Claim 10
Dependent Claim 45 words
A process of fabricating a capacitor structure, comprising the steps of: forming a lower electrode on a substrate; forming a ferroelectric thin film on the lower electrode; and forming a thin film made from Ru 1-x O x where 0.1<x<0.64 on the ferroelectric thin film.
Claim 11
Dependent Claim 38 words
A process of fabricating a capacitor structure according to claim 7, wherein the thin film made from Ru 1-x O x is formed in such a manner as to be brought in contact with the ferroelectric thin film.
Claim 12
Dependent Claim 48 words
A process of fabricating a capacitor structure according to claim 7, further comprising, after said step of forming the thin film made from Ru 1-x O x , the step of annealing said thin film made from Ru 1-x O x in an atmosphere at least containing hydrogen.

References Cited (Backward Citations)

US5366920A Cited
US5496437A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-11-29 2003-05-31 2003-11-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-11-29 2007-05-31 2007-11-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-11-29 2011-05-31 2011-11-30 $7700.00 Window Closed / Lapsed

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