US5981365A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Stacked poly-oxide-poly gate for improved silicide formation
Assignee: Advanced Micro Devices Inc
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Filing: 1998-03-10
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Granted: 1999-11-09
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Expires: 2018-03-10
Abstract
Abstract A method of fabricating an integrated circuit transistor in a substrate is provided. A gate electrode stack is formed on the substrate. The stack has a first insulating layer, a first conductor layer on the first insulating layer, a second insulating layer on the first conductor layer, and a second conductor layer on the second insulating layer. First and second source/drain regions are formed in the substrate in spaced apart relation to define a channel region underlying the first insulating layer. First and second sidewall spacers are formed adjacent to the gate electrode stack. The second conductor layer and the second insulating layer are sacrificed and a silicide layer is formed on the first conductor layer. The void remaining after removal of the second conductor and insulating layers establishes a large separation between the silicide forming titanium layer and the first conductor layer. The result is a gate electrode stack that is resistant to lateral silicide formation due to silicon diffusion.
Inventors
- 👤 Jon D. Cheek
- 👤 Derick J. Wristers
- 👤 Mark I. Gardner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 18:07
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/0212; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10D64/259; H10D64/01; H10D64/017
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
114 words
A method of fabricating an integrated circuit transistor in a substrate, comprising the steps of: forming a gate electrode stack on the substrate, the gate electrode stack having a first insulating layer, a first conductor layer on the first insulating layer, a second insulating layer on the first conductor layer, and a second conductor layer on the second insulating layer; forming first and second source/drain regions in the substrate in spaced apart relation to define a channel region underlying the first insulating layer; forming first and second sidewall spacers adjacent to the gate electrode stack; removing the second conductor layer and the second insulating layer; forming a silicide layer on the first conductor layer.
Claim 2
Independent Claim
114 words
A method of fabricating an integrated circuit transistor in a substrate, comprising the steps of: forming a gate electrode stack on the substrate, the gate electrode stack having a first insulating layer, a first conductor layer on the first insulating layer, a second insulating layer on the first conductor layer, and a second conductor layer on the second insulating layer; forming first and second source/drain regions in the substrate in spaced apart relation to define a channel region underlying the first insulating layer; forming first and second sidewall spacers adjacent to the gate electrode stack; removing the second conductor layer and the second insulating layer; forming a silicide layer on the first conductor layer.
Claim 3
Dependent Claim
25 words
The method of claim 1, wherein the step of forming the gate electrode stack comprises depositing polysilicon to form the first and second conductor layers.
Claim 4
Dependent Claim
34 words
The method of claim 1, wherein the step of forming the silicide layer comprises depositing titanium on the first conductor layer and reacting the titanium with the first conductor layer to form titanium silicide.
Claim 5
Dependent Claim
21 words
The method of claim 1, comprising the step of planarizing the first and second sidewall spacers substantially to the silicide layer.
Claim 6
Dependent Claim
13 words
The method of claim 4, wherein the planarizing is by chemical mechanical polishing.
Claim 7
Dependent Claim
27 words
The method of claim 1, comprising the step of forming a layer of silicon over the first and second source/drain regions prior to forming the silicide layer.
Claim 8
Independent Claim
111 words
A method of fabricating an integrated circuit transistor in a substrate having a first insulating layer, comprising the steps of: forming a first conductor layer on the first insulating layer; forming a second insulating layer on the first conductor layer; forming a second conductor layer on the second insulating layer; forming first and second source/drain regions in the substrate in spaced apart relation to define a channel region underlying the first insulating layer; forming first and second insulating sidewall spacers on the substrate adjacent to the first conductor and insulating layers; removing the second conductor layer and the second insulating layer; and forming a silicide layer on the first conductor layer.
Claim 9
Independent Claim
111 words
A method of fabricating an integrated circuit transistor in a substrate having a first insulating layer, comprising the steps of: forming a first conductor layer on the first insulating layer; forming a second insulating layer on the first conductor layer; forming a second conductor layer on the second insulating layer; forming first and second source/drain regions in the substrate in spaced apart relation to define a channel region underlying the first insulating layer; forming first and second insulating sidewall spacers on the substrate adjacent to the first conductor and insulating layers; removing the second conductor layer and the second insulating layer; and forming a silicide layer on the first conductor layer.
Claim 10
Dependent Claim
27 words
The method of claim 7, wherein the steps of forming the first and second conductor layers comprise depositing polysilicon to form the first and second conductor layers.
Claim 11
Dependent Claim
34 words
The method of claim 7, wherein the step of forming the silicide layer comprises depositing titanium on the first conductor layer and reacting the titanium with the first conductor layer to form titanium silicide.
Claim 12
Dependent Claim
18 words
The method of claim 7, comprising the step of planarizing the sidewall spacers substantially to the silicide layer.
Claim 13
Dependent Claim
13 words
The method of claim 10, wherein the planarizing is by chemical mechanical polishing.
Claim 14
Dependent Claim
27 words
The method of claim 7, comprising the step of forming a layer of silicon over the first and second source/drain regions prior to forming the silicide layer.
Claim 15
Independent Claim
99 words
A method of fabricating a gate electrode stack for an integrated circuit transistor in a substrate, comprising the steps of: forming a first insulating layer on the substrate; forming a first conductor layer on the first insulating layer; forming a second insulating layer on the first conductor layer; forming a second conductor layer on the second insulating layer; forming first and second sidewall spacers adjacent to the first and second insulating layers and the first and second conductor layers; removing the second conductor layer and the second insulating layer; and forming a silicide layer on the first conductor layer.
Claim 16
Independent Claim
99 words
A method of fabricating a gate electrode stack for an integrated circuit transistor in a substrate, comprising the steps of: forming a first insulating layer on the substrate; forming a first conductor layer on the first insulating layer; forming a second insulating layer on the first conductor layer; forming a second conductor layer on the second insulating layer; forming first and second sidewall spacers adjacent to the first and second insulating layers and the first and second conductor layers; removing the second conductor layer and the second insulating layer; and forming a silicide layer on the first conductor layer.
Claim 17
Dependent Claim
27 words
The method of claim 13 wherein the steps of forming the first and second conductor layers comprise depositing polysilicon to form the first and second conductor layers.
Claim 18
Dependent Claim
33 words
The method of claim 13, wherein the step of forming the silicide comprises depositing titanium on the first conductor layer and reacting the titanium with the first conductor layer to form titanium silicide.
Claim 19
Dependent Claim
21 words
The method of claim 13, comprising the step of planarizing the first and second sidewall spacers substantially to the silicide layer.
Claim 20
Dependent Claim
13 words
The method of claim 16, wherein the planarizing is by chemical mechanical polishing.
Claim 21
Dependent Claim
31 words
The method of claim 13, comprising the step of forming a layer of silicon on the substrate adjacent to the first and second sidewall spacers prior to forming the silicide layer.
Claim 22
Independent Claim
116 words
A method of fabricating an integrated circuit transistor in a substrate having a first insulating layer, comprising the steps of: forming a first polysilicon layer on the first insulating layer; forming a silicon dioxide layer on the first polysilicon layer; forming a second polysilicon layer on the silicon dioxide layer; forming first and second source/drain regions in the substrate in spaced apart relation to define a channel region underlying the first insulating layer; forming first and second insulating sidewall spacers on the substrate adjacent to the first and second polysilicon layers and the silicon dioxide layer; removing the second polysilicon layer and the silicon dioxide layer; and forming a silicide layer on the first polysilicon layer.
Claim 23
Independent Claim
116 words
A method of fabricating an integrated circuit transistor in a substrate having a first insulating layer, comprising the steps of: forming a first polysilicon layer on the first insulating layer; forming a silicon dioxide layer on the first polysilicon layer; forming a second polysilicon layer on the silicon dioxide layer; forming first and second source/drain regions in the substrate in spaced apart relation to define a channel region underlying the first insulating layer; forming first and second insulating sidewall spacers on the substrate adjacent to the first and second polysilicon layers and the silicon dioxide layer; removing the second polysilicon layer and the silicon dioxide layer; and forming a silicide layer on the first polysilicon layer.
Claim 24
Dependent Claim
32 words
The method of claim 19, wherein the step of forming the silicide layer comprises depositing titanium on the first polysilicon layer and reacting the titanium with the polysilicon to form titanium silicide.
Claim 25
Dependent Claim
18 words
The method of claim 19, comprising the step of planarizing the sidewall spacers substantially to the silicide layer.
Claim 26
Dependent Claim
13 words
The method of claim 21, wherein the planarizing is by chemical mechanical polishing.
Claim 27
Dependent Claim
27 words
The method of claim 19, comprising the step of forming a layer of silicon over the first and second source/drain regions prior to forming the silicide layer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-11-08 | 2003-05-10 | 2003-11-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-11-08 | 2007-05-10 | 2007-11-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-11-08 | 2011-05-10 | 2011-11-09 | $7700.00 | Window Closed / Lapsed |