Preamplifier system

Claim 2

A preamplifier system for amplifying and conditioning an input electromagnetic signal for insertion into a high power amplifier comprising: (a) a plurality of cascaded amplifying stages for incrementally amplifying said input electromagnetic signal, each of said amplifying stages including at least one transistor assembly defined by a plurality of integrally formed silicon carbide transistor cells coupled one to the other, said transistor assembly of at least one of said amplifying stages having integrated therein a greater number of silicon carbide transistor cells than said transistor assembly of at least one other of said amplifying stages; (b) bias control means coupled to said amplifying stages for electrically biasing each said amplifying stage, respectively, to operate in one of a plurality of predetermined operational modes including a Class A mode and a Class AB mode, said bias control means maintaining at least one of said amplifying stages in said Class A mode; and, (c) adjustable phase shift means coupled to at least one of said amplifying stages for shifting the phase of said input electromagnetic signal with respect to a predetermined reference signal.

Claim 3

The preamplifier system as recited in claim 1 wherein said bias control means maintains a first pair of said amplifying stages in said Class A mode of operation.

Claim 4

The preamplifier system as recited in claim 2 wherein said bias control means maintains a second pair of said amplifying stages in said Class AB mode of operation.

Claim 5

The preamplifier system as recited in claim 3 wherein said transistor assemblies of said first pair of said amplifying stages each include six silicon carbide transistor cells and said transistor assemblies of said second pair of said amplifying stages each include twelve silicon carbide transistor cells.

Claim 6

The preamplifier system as recited in claim 1 wherein said bias control means includes stabilization circuitry adapted to substantially abate operational oscillation of said amplifying stages.

Claim 7

The preamplifier system as recited in claim 5 wherein said stabilization circuitry includes a passive feedback circuit coupled to each said transistor assembly.

Claim 8

The preamplifier system as recited in claim 4 further comprising variable attenuator means coupled to said adjustable phase shift means and adapted to reversibly attenuate the amplitude of said input electromagnetic signal responsive to a control system.

Claim 9

The preamplifier system as recited in claim 7 further comprising a fixed attenuation unit respectively coupled at least to each of said amplifying stages of said first amplifying stage pair.

Claim 10

The preamplifier system as recited in claim 1 further comprising matching circuit means coupled to each of said transistor assemblies, said matching circuit means tuning said amplifying stages for operation in a UHF TV frequency range.

Claim 11

The preamplifier system as recited in claim 9 wherein said matching circuit means operably define for each of said amplifying stages an operational frequency bandwidth greater than approximately 24 MHz.

Claim 12

A preamplifier system adapted for actuation by a control system to amplify and condition an input electromagnetic signal for insertion into a high power amplifier comprising: (a) an adjustable phase shift unit for shifting the phase of said input electromagnetic signal with respect to a predetermined reference signal; (b) a variable attenuation unit coupled to said adjustable phase shift unit for reversibly attenuating the amplitude of said input electromagnetic signal responsive to said actuation by said control system; (c) an amplification section coupled to at least one of said adjustable phase shift and said variable attenuation units, said amplification section including: (1) a plurality of cascaded amplifying stages for incrementally amplifying said input electromagnetic signal, each of said amplifying stages including at least one transistor assembly defined by a plurality of integrally formed silicon carbide transistor cells coupled in parallel one to the other; (2) bias control circuitry coupled to said amplifying stages for electrically biasing said amplifying stages, respectively, to operate cooperatively in a substantially linear manner, said bias control circuitry operably configuring at least one of said amplifying stages for operation in a Class A mode and at least one of said amplifying stages for operation in a Class AB mode; and, (3) matching circuitry coupled to each of said transistor assemblies.

Claim 13

A preamplifier system adapted for actuation by a control system to amplify and condition an input electromagnetic signal for insertion into a high power amplifier comprising: (a) an adjustable phase shift unit for shifting the phase of said input electromagnetic signal with respect to a predetermined reference signal; (b) a variable attenuation unit coupled to said adjustable phase shift unit for reversibly attenuating the amplitude of said input electromagnetic signal responsive to said actuation by said control system; (c) an amplification section coupled to at least one of said adjustable phase shift and said variable attenuation units, said amplification section including: (1) a plurality of cascaded amplifying stages for incrementally amplifying said input electromagnetic signal, each of said amplifying stages including at least one transistor assembly defined by a plurality of integrally formed silicon carbide transistor cells coupled in parallel one to the other; (2) bias control circuitry coupled to said amplifying stages for electrically biasing said amplifying stages, respectively, to operate cooperatively in a substantially linear manner, said bias control circuitry operably configuring at least one of said amplifying stages for operation in a Class A mode and at least one of said amplifying stages for operation in a Class AB mode; and, (3) matching circuitry coupled to each of said transistor assemblies.

Claim 14

The preamplifier system as recited in claim 11 wherein said bias control circuitry maintains at least a first pair of said amplifying stages in said Class A mode of operation.

Claim 15

The preamplifier system as recited in claim 12 wherein said bias control circuitry maintains at least a second pair of said amplifying stages in said Class AB mode of operation.

Claim 16

The preamplifier system as recited in claim 12 wherein said transistor assemblies of said first pair of said amplifying stages each include six silicon carbide transistor cells and said transistor assemblies of said second pair of said amplifying stages each include twelve silicon carbide transistor cells.

Claim 17

The preamplifier system as recited in claim 11 wherein said bias control circuitry includes a stabilization circuit portion adapted to substantially abate operational oscillations of said amplifying stages.

Claim 18

The preamplifier system as recited in claim 15 wherein said stabilization circuit portion includes a passive RCL feedback circuit coupled to each said transistor assembly.

Claim 19

The preamplifier system as recited in claim 13 further comprising a fixed attenuation unit respectively coupled at least to each of said amplifying stages of said first amplifying stage pair.

Claim 20

The preamplifier system as recited in claim 11 wherein said matching circuitry operably defines for each of said amplifying stages an operational frequency bandwidth greater than approximately 24 MHz.

Claim 21

A preamplifier system for amplifying and conditioning an input electromagnetic signal for insertion into a high power amplifier comprising: (a) adjustable phase shift means for shifting the phase of said input electromagnetic signal with respect to a predetermined reference signal; (b) an amplification section coupled to said adjustable phase shift means, said amplification section containing: (1) a plurality of cascaded amplifying stages for amplifying said input electromagnetic signal, each of said amplifying stages including at least one transistor assembly defined by a plurality of integrally formed silicon carbide transistor cells coupled in parallel one to the other; and, (2) bias control means coupled to said amplifying stages for electrically biasing each said amplifying stage, respectively, to operate in one of a plurality of predetermined operational modes including a Class A mode and a Class AB mode, said bias control means maintaining a first pair of said amplifying stages in said Class A mode of operation and a second pair of said amplifying stages in said Class AB mode of operation, whereby said amplifying stages are adapted to operate cooperatively in substantially linear manner.

Claim 22

A preamplifier system for amplifying and conditioning an input electromagnetic signal for insertion into a high power amplifier comprising: (a) adjustable phase shift means for shifting the phase of said input electromagnetic signal with respect to a predetermined reference signal; (b) an amplification section coupled to said adjustable phase shift means, said amplification section containing: (1) a plurality of cascaded amplifying stages for amplifying said input electromagnetic signal, each of said amplifying stages including at least one transistor assembly defined by a plurality of integrally formed silicon carbide transistor cells coupled in parallel one to the other; and, (2) bias control means coupled to said amplifying stages for electrically biasing each said amplifying stage, respectively, to operate in one of a plurality of predetermined operational modes including a Class A mode and a Class AB mode, said bias control means maintaining a first pair of said amplifying stages in said Class A mode of operation and a second pair of said amplifying stages in said Class AB mode of operation, whereby said amplifying stages are adapted to operate cooperatively in substantially linear manner.

Claim 23

A preamplifier system as recited in claim 19 wherein said bias control means includes a passive feedback circuit coupled to each said transistor assembly and adapted to substantially abate operational oscillations of said amplifying stages.

Claim 24

The preamplifier system as recited in claim 19 wherein said transistor assemblies of said first pair of said amplifying stages each include six silicon carbide transistor cells.

Claim 25

The preamplifier system as recited in claim 19 wherein said transistor assemblies of said second pair of said amplifying stages each include twelve silicon carbide transistor cells.

Claim 26

The preamplifier system as recited in claim 19 further comprising matching circuit means coupled each of said transistor assemblies, said matching circuit means operably defining for each of said amplifying stages an operational frequency bandwidth greater than approximately 24 MHz.