Adaptive distance protection system

Claim 2

An adaptive distance protection method for use with an underreaching relay in a power system comprising a protected circuit and a parallel circuit, wherein said protected and parallel circuits are connected in parallel between a first bus (G) and a second bus (H), and wherein said underreaching relay comprises current and voltage measuring devices for measuring currents and voltages on said protected circuit, comprising the steps of: (A) determining whether a measurement of current in said parallel circuit is available and, if so: (A1) calculating a blocking criterion (α 0 or α 2 ); (A2) determining whether said blocking criterion (α 0 or α 2 ) is less than a predefined default value; (A3) if said blocking criterion is less than said default value, computing a compensated fault current using the zero sequence current (I Psf0 ) in said parallel circuit; (A4) if said blocking criterion is not less than said default value, computing the compensated fault current using a first zero sequence current compensation factor; (B) if said current measurement is unavailable: (B1) determining whether an operating status of said parallel circuit is available and, if so, whether said protected and parallel circuits are in operation; (B2) if the parallel circuit's operating status is available and both circuits are in operation, calculating a compensated fault current using a second zero sequence current compensation factor; (B3) if the parallel circuit's operating status is unavailable, calculating the compensated fault current using a third zero sequence compensation factor; (B4) if the parallel circuit's operating status is available and one line is not in operation, calculating the compensated fault current using a fourth zero sequence compensation factor; and (C) calculating an apparent impedance value Z apparent .

Claim 3

A method as recited in claim 1, wherein: k 0 is determined by, k 0 =(Z l0 -Z l1 ) /Z l1 , where Z l0 and Z l1 are zero and positive sequence line impedances, respectively, in said protected circuit; k 0 " is determined by, k 0 "=Z l0 *Z AB0 -Z l1 *Z AB0 -Z 2 0M /(Z l1 *Z AB0 ); α 0 is a ratio of zero sequence currents in the first and second circuits; and α 2 is a ratio of negative sequence currents in the first and second circuits; wherein Z 0M is a zero sequence mutual coupling between the protected circuit and the parallel circuit; and Z AB0 is a zero sequence line impedance for the parallel circuit.

Claim 4

A method as recited in claim 2, wherein α 0 and α 2 are determined by: α 0 =|I Psf0 /I sf0 | α 1 ,2 =|I Psf1 ,2 /I sf1 ,2 |; wherein I sf0 is a zero sequence current at bus G; I sf1 is a positive sequence current at bus G; I sf2 is negative sequence current at but G; I Psf0 is a parallel circuit zero sequence current at bus G; I Psf1 is a parallel circuit positive sequence current at bus G; and I Psf2 is a parallel circuit negative sequence current at bus G.

Claim 5

A method as recited in claim 3, wherein Z apparent is determined by Z apparent =V Gf /I c sfa , wherein I c sfa is compensated post-fault phase current and V Gf is a measured post-fault voltage at bus G.

Claim 6

A method as recited in claim 4, wherein said first, second, third and fourth compensation factors are different from one another.

Claim 7

A method as recited in claim 4, wherein at least two of said first, second, third and fourth compensation factors are the same as one another.

Claim 8

An adaptive distance protection method for use with an overreaching relay in a power system comprising a protected circuit and a parallel circuit, wherein said protected and parallel circuits are connected in parallel between a first bus (G) and a second bus (H), and wherein said overreaching relay comprises current and voltage measuring devices for measuring currents and voltages on said protected circuit, comprising the steps of: (A) determining whether a measurement of current in said parallel circuit is available and, if so: (A1) calculating a blocking criterion (α 0 or α 2 ); (A2) determining whether said blocking criterion (α 0 or α 2 ) is less than a predefined default value; (A3) if said blocking criterion is less than said predefined default value, computing a compensated fault current using the zero sequence current (I Psf0 ) in said parallel circuit; (A4) if said blocking criterion is not less than said predefined default value, calculating a compensated fault current using a first zero sequence current compensation factor; (B) if said current measurement is unavailable: (B1) determining whether an operating status of said parallel circuit is available and, if so, whether the protected and parallel circuits are in operation; (B2) if the parallel circuit's operating status is available and both circuits are in operation, calculating a compensated fault current using a second zero sequence current compensation factor; (B3) if the parallel circuit's operating status is unavailable, calculating the compensated fault current using a third zero sequence compensation factor; (B4) if the parallel circuit's operating status is available and at least one line is not in operation, calculating the compensated fault current using a fourth zero sequence compensation factor; and (C) calculating an apparent impedance value Z apparent .

Claim 9

An adaptive distance protection method for use with an overreaching relay in a power system comprising a protected circuit and a parallel circuit, wherein said protected and parallel circuits are connected in parallel between a first bus (G) and a second bus (H), and wherein said overreaching relay comprises current and voltage measuring devices for measuring currents and voltages on said protected circuit, comprising the steps of: (A) determining whether a measurement of current in said parallel circuit is available and, if so: (A1) calculating a blocking criterion (α 0 or α 2 ); (A2) determining whether said blocking criterion (α 0 or α 2 ) is less than a predefined default value; (A3) if said blocking criterion is less than said predefined default value, computing a compensated fault current using the zero sequence current (I Psf0 ) in said parallel circuit; (A4) if said blocking criterion is not less than said predefined default value, calculating a compensated fault current using a first zero sequence current compensation factor; (B) if said current measurement is unavailable: (B1) determining whether an operating status of said parallel circuit is available and, if so, whether the protected and parallel circuits are in operation; (B2) if the parallel circuit's operating status is available and both circuits are in operation, calculating a compensated fault current using a second zero sequence current compensation factor; (B3) if the parallel circuit's operating status is unavailable, calculating the compensated fault current using a third zero sequence compensation factor; (B4) if the parallel circuit's operating status is available and at least one line is not in operation, calculating the compensated fault current using a fourth zero sequence compensation factor; and (C) calculating an apparent impedance value Z apparent .

Claim 10

A method as recited in claim 7, wherein: k 0 is determined by, k 0 =(Z l0 -Z l1 )/Z l1 , where Z l0 and Z l1 are zero and positive sequence line impedances, respectively, in said protected circuit; k 0 ' is determined by, K 0 '=(Z l0-Z l1 +Z 0M )/Z l1 ; α 0 is a ratio of zero sequence currents in the first and second circuits; and α 2 is a ratio of negative sequence currents in the first and second circuits; wherein Z 0M is a zero sequence mutual coupling between the protected circuit and the parallel circuit; and Z AB0 is a zero sequence line impedance for the parallel circuit.

Claim 11

A method as recited in claim 8, wherein α 0 and α 2 are determined by: α 0 =|I Psf0 /I sf0 |, α 1 ,2 =|I Psf1 ,2 /I sf1 ,2 |; wherein I sf0 is a zero sequence current at bus G; I sf1 is a positive sequence current at bus G; I sf2 is negative sequence current at but G; I Psf0 is a parallel circuit zero sequence current at bus G; I Psf1 is a parallel circuit positive sequence current at bus G; and I Psf2 is a parallel circuit negative sequence current at bus G.

Claim 12

A method as recited in claim 9, wherein Z apparent is determined by Z apparent =V Gf /I C sfa , wherein I C sfa is a compensated post-fault phase current and V Gf is a measured post-fault voltage at bus G.

Claim 13

A method as recited in claim 10, wherein said first, second, third and fourth compensation factors are different from one another.

Claim 14

A method as recited in claim 10, wherein at least two of said first, second, third and fourth compensation factors are the same as one another.