US5953615A
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Pre-amorphization process for source/drain junction
Assignee: GlobalFoundries Inc
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Filing: 1999-01-27
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Granted: 1999-09-14
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Expires: 2019-01-27
Abstract
Abstract The inventive method provides MOSFET's with deep source/drain junctions and shallow source/drain extensions. The invention provides on a semiconductor wafer a gate stack with side spacers. The side spacers are etched so that a known thickness of the side spacers is left. An ion beam is used to implant Si + or Ge + or Xe + to amorphize the silicon region, creating an amorphous region with two different depths. A high dose ion beam is then used to implant a dopant. An oxide layer is then deposited as a barrier layer, and then a metal layer is deposited to improve laser energy absorption. Laser annealing is used to melt the amorphous silicon region which causes the dopant to diffuse into the amorphous silicon region creating deep source/drain junctions and shallow source/drain extensions. Conventional techniques are then used to complete the transistor, which includes silicidation of the source/drain junctions. The deep source/drain junctions allow for an easier silicidation. The shallow source/drain extensions help to prevent punch through.
Inventors
- 👤 Bin Yu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 12:14
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/0229; H10P30/208; H10P30/22; H10P34/00; H10P34/40; H10P34/42; H10P30/21; H10P30/225; H10P30/28
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
135 words
A method of producing a plurality of semiconductor devices on a semiconductor wafer, comprising the steps of: placing a plurality of gates on the semiconductor wafer; forming a plurality of spacers on the sides of the gates; etching the plurality of spacers, wherein the plurality of spacers are etched to a known thickness; amorphizing part of the semiconductor wafer, forming a plurality of shallow amorphous regions in areas of the semiconductor wafer under the plurality of spacers and a plurality of deep amorphous regions in areas of the semiconductor wafer that are not under the plurality of spacers or the plurality of gates implanting a dopant into the plurality of shallow amorphous regions and the plurality of deep amorphous regions; and annealing the plurality of shallow amorphous regions and the plurality of deep amorphous regions.
Claim 2
Independent Claim
135 words
A method of producing a plurality of semiconductor devices on a semiconductor wafer, comprising the steps of: placing a plurality of gates on the semiconductor wafer; forming a plurality of spacers on the sides of the gates; etching the plurality of spacers, wherein the plurality of spacers are etched to a known thickness; amorphizing part of the semiconductor wafer, forming a plurality of shallow amorphous regions in areas of the semiconductor wafer under the plurality of spacers and a plurality of deep amorphous regions in areas of the semiconductor wafer that are not under the plurality of spacers or the plurality of gates implanting a dopant into the plurality of shallow amorphous regions and the plurality of deep amorphous regions; and annealing the plurality of shallow amorphous regions and the plurality of deep amorphous regions.
Claim 3
Dependent Claim
145 words
The method, as recited in claim 1, wherein the step of amorphizing, comprises the steps of: directing a plurality of ions from an ion beam for amorphization towards the semiconductor wafer; passing a first part of the plurality of ions through the plurality of spacer so that the energy of the first part of the plurality of ions is reduced as the first part of the plural of ions pass through the spacers; passing the first part of the plurality of ions into the areas of the semiconductor wafer under the plurality of spacer forming the shallow amorphous regions, due to the reduced energy of the first part of the plurality of ions; and passing a second part of the plurality of ions into areas of the semiconductor wafer not covered by the plurality of spacers and plurality of gates, thus forming deep amorphous regions.
Claim 4
Dependent Claim
22 words
The method, as recited in claim 2, wherein the step of etching comprises the step of using a well-controlled wet chemical etching.
Claim 5
Dependent Claim
28 words
The method, as recited in claim 3, further comprising the step of etching away the plurality of spacers after the step of amorphizing part of the semiconductor wafer.
Claim 6
Dependent Claim
63 words
The method, as recited in claim 4, wherein the step of annealing comprises the steps of: depositing an oxide film over the semiconductor wafer including the plurality of shallow amorphous regions and the plurality of deep amorphous regions; depositing a metal layer over the oxide film; heating the metal layer with a laser beam; and removing the metal layer and the oxide film.
Claim 7
Dependent Claim
39 words
The method, as recited in claim 5, wherein the step of implanting a dopant comprises the step of directing an ion beam of dopant ions towards the plurality of shallow amorphous regions and the plurality of deep amorphous regions.
Claim 8
Dependent Claim
35 words
The method, as recited in claim 6, wherein the plurality of ions from the ion beam for amorphization are ions selected from the group consisting of Si + and Ge + and Xe + .
Claim 9
Dependent Claim
33 words
The method, as recited in claim 7, wherein the step of heating the metal layer with a laser beam comprises the step of directing an ultra-rapid excimer laser beam towards the metal layer.
Claim 10
Dependent Claim
26 words
The method, as recited in claim 8, wherein the dopant ions are selected from the group consisting of ions of arsenic, phosphorous, boron trifluoride and boron.
Claim 11
Independent Claim
63 words
The method, as recited in 9, wherein the step of annealing the plurality of shallow amorphous regions and the plurality of deep amorphous regions transforms the plurality of shallow amorphous regions into a plurality of shallow source/drain extensions and transforms the plurality of deep amorphous regions into a plurality of deep source/drain junctions, further comprising the step of silicidating the deep source/drain junctions.
Claim 12
Independent Claim
63 words
The method, as recited in 9, wherein the step of annealing the plurality of shallow amorphous regions and the plurality of deep amorphous regions transforms the plurality of shallow amorphous regions into a plurality of shallow source/drain extensions and transforms the plurality of deep amorphous regions into a plurality of deep source/drain junctions, further comprising the step of silicidating the deep source/drain junctions.
Claim 13
Independent Claim
63 words
The method, as recited in 4, wherein the step of annealing the plurality of shallow amorphous regions and the plurality of deep amorphous regions transforms the plurality of shallow amorphous regions into a plurality of shallow source/drain extensions and transforms the plurality of deep amorphous regions into a plurality of deep source/drain junctions, further comprising the step of silicidating the deep source/drain junctions.
Claim 14
Independent Claim
63 words
The method, as recited in 4, wherein the step of annealing the plurality of shallow amorphous regions and the plurality of deep amorphous regions transforms the plurality of shallow amorphous regions into a plurality of shallow source/drain extensions and transforms the plurality of deep amorphous regions into a plurality of deep source/drain junctions, further comprising the step of silicidating the deep source/drain junctions.
Claim 15
Independent Claim
63 words
The method, as recited in 1, wherein the step of annealing the plurality of shallow amorphous regions and the plurality of deep amorphous regions transforms the plurality of shallow amorphous regions into a plurality of shallow source/drain extensions and transforms the plurality of deep amorphous regions into a plurality of deep source/drain junctions, further comprising the step of silicidating the deep source/drain junctions.
Claim 16
Independent Claim
63 words
The method, as recited in 1, wherein the step of annealing the plurality of shallow amorphous regions and the plurality of deep amorphous regions transforms the plurality of shallow amorphous regions into a plurality of shallow source/drain extensions and transforms the plurality of deep amorphous regions into a plurality of deep source/drain junctions, further comprising the step of silicidating the deep source/drain junctions.
References Cited (Backward Citations)
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