RF power amplifier with high efficiency and a wide range of gain control

Claim 1

A RF power amplifier with high output efficiency and wide range of gain control comprising: a first-stage amplifier which comprises a first power transistor, a first bias circuit, and a first bias source, wherein the drain and source of said first power transistor are coupled to a voltage source node and a ground reference node respectively, said first bias source with a fixed voltage level is fed to the gate of said first power transistor via said first bias circuit, thereby allowing said first-stage amplifier to function as a class A or a class AB amplifier, and an input signal coupled to the gate of said first power transistor is amplified and then output at the drain of said first power transistor; a second-stage amplifier which comprises a second power transistor, a second bias circuit, and a second bias source, wherein the drain and source of said second power transistor are coupled to said voltage source node and said ground reference node respectively, and said second bias source is fed to the gate of said second power transistor via said second bias circuit, and the turn-on drain current of said second power transistor can be adjusted by varying the voltage of said second bias source to achieve output power control, and the output signal of said first-stage amplifier coupled to the gate of said second-stage power transistor is amplified by said second-stage amplifier and then output at the drain of said second power transistor; and a third-stage amplifier which comprises a third power transistor, a third bias circuit, and a third bias source, wherein the drain and source of said third power transistor are coupled to a voltage source node and a ground reference node respectively, and said third bias source with a fixed voltage level is fed to the gate of said third power transistor via said third bias circuit, thereby allowing said third-stage amplifier to function as a class C amplifier, and the output signal of said second-stage amplifier coupled to the gate of said third-stage power transistor is amplified by said third-stage amplifier and then output at the drain of said third power transistor.