US5940456A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Synchronous plesiochronous digital hierarchy transmission systems
Assignee: UTStarcom Inc
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Filing: 1996-06-20
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Granted: 1999-08-17
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Expires: 2016-06-20
Abstract
Abstract A system that allows multiple bundles of plesiochronous digital hierarchy (PDH) payload data streams to be synchronously trasmitted from one point to another is described. The system multiplexes multiple stages of the PDH using a single clock signal. This removes the need to perform stuffing and de-stuffing of the data streams at the various stages of the multiplexing.
Inventors
- 👤 Robert Xuebo Chen
- 👤 William Xiao-Qing Huang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 12:39
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/16; H04J3/1605; H04J3/1623; H04J3/1641; H04J3/02; H04J3/06; H04J3/0635; H04J3/0685; H04J3/08
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
120 words
A communication system comprising: means for accepting at least two plesiochronous digital hierarchy (PDH) input signals, the PDH input signals to be combined through at least two stages of the plesiochronous digital hierarchy; a dock; a first converting means for converting said two plesiochronous digital hierarchy input signals into a first and a second set of parallel data, said two sets of parallel data being synchronized by said clock through said at least two stages of the plesiochronous digital hierarchy without stuffing bits for synchronizing the first and second set of parallel data; and an encoder for accepting said first and said second sets of parallel data and for generating a serial output representative of said two PDH input signals.
Claim 2
Dependent Claim
120 words
A communication system comprising: means for accepting at least two plesiochronous digital hierarchy (PDH) input signals, the PDH input signals to be combined through at least two stages of the plesiochronous digital hierarchy; a dock; a first converting means for converting said two plesiochronous digital hierarchy input signals into a first and a second set of parallel data, said two sets of parallel data being synchronized by said clock through said at least two stages of the plesiochronous digital hierarchy without stuffing bits for synchronizing the first and second set of parallel data; and an encoder for accepting said first and said second sets of parallel data and for generating a serial output representative of said two PDH input signals.
Claim 3
Dependent Claim
21 words
The communication system of claim 1 further comprising an optical transmitter for coupling said serial output to an optical communication medium.
Claim 4
Dependent Claim
14 words
The communication system of claim 1 wherein said encoder comprises a mB/nB digital transmitter.
Claim 5
Dependent Claim
59 words
The communication system of claim 1 further comprising: a decoder for accepting a serial input and for generating at least two sets of parallel date corresponding to said serial input; and means for converting said two sets of parallel data generated by said decoder into two separate PDH data each having a lower signaling rate than said serial input.
Claim 6
Dependent Claim
14 words
The communication system of claim 4 wherein said decoder comprises a mB/nB digital receiver.
Claim 7
Dependent Claim
22 words
The communication system of claim 1 wherein said first converting means further comprises two serial to parallel circuits controlled by said clock.
Claim 8
Dependent Claim
90 words
The communication system of claim 2 further comprising: an optical receiver for generating a serial signal from signal transmitted on said optical communication medium; a decoder for accepting said serial signal and for generating at least two sets of parallel data corresponding to said serial signal; means coupled to said decoder for generating a recovered clock signal; and a second converting means for converting said two sets of parallel data generated by said decoder into two separate PDH data streams each having a lower signaling rate than said serial signal.
Claim 9
Dependent Claim
22 words
The communication system of claim 7 wherein said encoder comprises a mB/nB digital transmitter and said decoder comprises a mB/nB digital receiver.
Claim 10
Dependent Claim
22 words
The communication system of claim 7 wherein said first converting means further comprises two serial to parallel circuits controlled by said clock.
Claim 11
Dependent Claim
24 words
The communication system of claim 9 wherein said second converting means further comprises two parallel to serial circuits controlled by said recovered clock signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-08-16 | 2003-02-15 | 2003-08-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-08-16 | 2007-02-15 | 2007-08-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-08-16 | 2011-02-15 | 2011-08-17 | $7700.00 | Window Closed / Lapsed |