US5940450A
Expired / Lapsed
US
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Carrier recovery method and apparatus
Assignee: Hitachi America Ltd
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Filing: 1997-02-28
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Granted: 1999-08-17
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Expires: 2017-02-28
Abstract
Abstract Improved carrier recovery methods and apparatus suitable for use with QAM, QPSK and a wide variety of other modulation formats is described. In accordance with the invention, the phase error between received symbols, representing a frequency error, is determined using one of a plurality of techniques. The estimated frequency error is used to adjust the phase and/or frequency of a received carrier signal to achieve a frequency lock. The methods and apparatus of the present invention can be easily integrated into existing carrier recovery designs to supplement known frequency In accordance with a first embodiment of the present invention, the receipt of pairs of consecutive outer symbols is detected, a frequency error associated with each pair of consecutive symbols is generated, and the frequency error is compared to a selected threshold value to determine if it is a non-ambiguous estimate of the frequency error. If the frequency error is non-ambiguous and from a pair of consecutive outer symbols, it is used to adjust the frequency and/or phase of a received carrier signal. In the second embodiment, the receipt of pairs of consecutive outer symbols are detected. An estimate of the frequency error, determined as the phase error between received symbols, is made in the second embodiment by doing a symbol to symbol, as opposed to a symbol to target comparison.
Inventors
- 👤 Joshua L. Koslov
- 👤 Frank A. Lane
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 10:27
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/32; H04L27/34; H04L27/38; H04L27/3818; H04L27/3827
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
82 words
A method of processing a first signal including a sequence of symbols, the sequence of symbols including both inner and outer symbols, the method comprising the steps of: receiving the sequence of symbols included in the first signal; and analyzing the received sequence of symbols to identify a set of consecutive outer symbols, the set of consecutive outer symbols including at least two sequentially received outer symbols one of which immediately follows the other outer symbol in the received sequence of symbols.
Claim 2
Independent Claim
82 words
A method of processing a first signal including a sequence of symbols, the sequence of symbols including both inner and outer symbols, the method comprising the steps of: receiving the sequence of symbols included in the first signal; and analyzing the received sequence of symbols to identify a set of consecutive outer symbols, the set of consecutive outer symbols including at least two sequentially received outer symbols one of which immediately follows the other outer symbol in the received sequence of symbols.
Claim 3
Independent Claim
111 words
A method of processing a first signal including a sequence of symbols, the sequence of symbols including both inner and outer symbols, the method comprising the steps of: receiving the sequence of symbols included in the first signal; analyzing the received sequence of symbols to identify a set of consecutive outer symbols, the set of consecutive outer symbols including at least two sequentially received outer symbols one of which immediately follows the other outer symbol in the received sequence of symbols; generating an estimate of the frequency error associated with an identified set of consecutive outer symbols; and utilizing the estimated frequency error to adjust the frequency of the first signal.
Claim 4
Independent Claim
111 words
A method of processing a first signal including a sequence of symbols, the sequence of symbols including both inner and outer symbols, the method comprising the steps of: receiving the sequence of symbols included in the first signal; analyzing the received sequence of symbols to identify a set of consecutive outer symbols, the set of consecutive outer symbols including at least two sequentially received outer symbols one of which immediately follows the other outer symbol in the received sequence of symbols; generating an estimate of the frequency error associated with an identified set of consecutive outer symbols; and utilizing the estimated frequency error to adjust the frequency of the first signal.
Claim 5
Dependent Claim
49 words
The method of claim 2, further comprising the step of: determining if the estimated frequency error is ambiguous; and wherein the step of utilizing the estimated frequency error to adjust the frequency of the first signal is performed only when the estimated frequency error is determined to be non-ambiguous.
Claim 6
Dependent Claim
32 words
The method of claim 3, wherein the step of determining if the estimated frequency error is ambiguous includes the step of: comparing the estimated frequency error to a first preselected threshold value.
Claim 7
Dependent Claim
41 words
The method of claim 4, wherein the step of analyzing the sequence of received symbols to identify a set of consecutive outer symbols includes the step of: comparing the magnitude squared of each received symbol to a second preselected threshold value.
Claim 8
Dependent Claim
77 words
The method of claim 2, wherein the step of generating the estimate of the frequency error includes the steps of: generating, as a function of a first sliced symbol value, a first phase error associated with a first symbol in the identified set of consecutively received outer symbols; and generating, as a function of a second sliced symbol value, a second phase error associated with a second symbol in the identified set of consecutively received outer symbols.
Claim 9
Dependent Claim
49 words
The method of claim 6, wherein the step of generating the estimate of the frequency error further includes the step of: subtracting the second phase error from the first phase error to generate the estimated frequency error, the estimated frequency error thereby corresponding to a difference of phase errors.
Claim 10
Dependent Claim
29 words
The method of claim 2, wherein the frequency error estimate is generated as a function of the magnitude of first and second symbols in a set of identified symbols.
Claim 11
Dependent Claim
60 words
The method of claim 8, wherein the step of analyzing the first signal to identify a set of consecutive outer symbols includes the steps of: comparing the magnitude squared of each received symbol to a preselected threshold value, the preselected threshold value being a value which will be exceeded when an outermost symbol in a constellation of symbols is received.
Claim 12
Dependent Claim
64 words
The method of claim 8, wherein the step of analyzing the first signal to identify a set of consecutive outer symbols includes the steps of: comparing the magnitude squared of each received symbol in first signal to a preselected threshold value, the preselected threshold value being a value which will be exceeded when a non-inner most symbol in a constellation of symbols is received.
Claim 13
Dependent Claim
110 words
A frequency error detection circuit for generating a frequency error signal from a signal including a sequence of symbols, the symbols including inner and outer symbols, the apparatus comprising: a signal input for receiving the signal; a consecutive outer symbol detection circuit coupled to the signal input for detecting the receipt of a set of consecutively received outer symbols, the set of consecutively received outer symbols including at least two sequentially received outer symbols one of which immediately follows the other outer symbol in the received sequence of symbols; and a frequency error estimation circuit coupled to the signal input for generating a frequency error signal from consecutively received symbols.
Claim 14
Dependent Claim
110 words
A frequency error detection circuit for generating a frequency error signal from a signal including a sequence of symbols, the symbols including inner and outer symbols, the apparatus comprising: a signal input for receiving the signal; a consecutive outer symbol detection circuit coupled to the signal input for detecting the receipt of a set of consecutively received outer symbols, the set of consecutively received outer symbols including at least two sequentially received outer symbols one of which immediately follows the other outer symbol in the received sequence of symbols; and a frequency error estimation circuit coupled to the signal input for generating a frequency error signal from consecutively received symbols.
Claim 15
Dependent Claim
54 words
The apparatus of claim 11, further comprising: control logic coupled to the outer symbol detection circuit and the frequency error estimation circuit, the control logic being responsive to the outer symbol detection circuit to control the output of the frequency error signal, generated by the frequency error estimation circuit, from frequency error detection circuit.
Claim 16
Dependent Claim
23 words
The apparatus of claim 12, further comprising: a frequency error ambiguity detector coupled to the frequency error estimation circuit and the control logic.
Claim 17
Dependent Claim
31 words
The apparatus of claim 11, wherein the frequency error estimation circuit includes means for subtracting phase error signals associated with first and second symbols in a set of consecutively received symbols.
Claim 18
Dependent Claim
30 words
The apparatus of claim 11, wherein the frequency error estimation circuit includes means for generating a frequency error estimate as a function of the magnitudes of two consecutively received symbols.
Claim 19
Dependent Claim
57 words
The apparatus of claim 15, wherein the means for generating a frequency error estimate includes means for generating the real and imaginary parts resulting from a complex multiplication of one received symbol in a set of consecutively received outer symbols with the complex conjugate of another received symbol in the same set of consecutively received outer symbols.
Claim 20
Dependent Claim
28 words
The apparatus of claim 16, wherein the means for generating a frequency error estimate further includes: means for limiting the generated frequency error estimate to an unambiguous range.
Claim 21
Independent Claim
89 words
A method, of processing a first signal including a sequence of symbols, the method comprising the steps of: receiving the sequence of symbols included in the first signal; identifying a set of consecutively received outer symbols, the set of consecutive outer symbols including at least two sequentially received outer symbols one of which immediately follows the other outer symbol in the received sequence of symbols; and generating an estimate of a frequency error associated with the identified set of consecutively received outer symbols in the received sequence of symbols.
Claim 22
Independent Claim
89 words
A method, of processing a first signal including a sequence of symbols, the method comprising the steps of: receiving the sequence of symbols included in the first signal; identifying a set of consecutively received outer symbols, the set of consecutive outer symbols including at least two sequentially received outer symbols one of which immediately follows the other outer symbol in the received sequence of symbols; and generating an estimate of a frequency error associated with the identified set of consecutively received outer symbols in the received sequence of symbols.
Claim 23
Dependent Claim
56 words
The method of claim 18, wherein the step of generating a frequency error estimate includes the step of: generating the real and imaginary parts resulting from a complex multiplication of one received symbol in the set of consecutively received symbols with the complex conjugate of another received symbol in the same set of consecutively received symbols.
Claim 24
Dependent Claim
37 words
The method of claim 19, wherein the step of generating a frequency error estimate further includes the step of: limiting the generated frequency error estimate to a value within an unambiguous range of frequency error estimate values.
Claim 25
Dependent Claim
91 words
A carrier recovery circuit, comprising: a signal de-rotator; a phase detector coupled to the signal de-rotator; a slicer module coupled to the signal de-rotator and the phase detector; a filter coupled to the phase detector and to the signal de-rotator, the filter generating a signal used to control a frequency of an input signal to the de-rotator; and a frequency error detection circuit coupled to the de-rotator and the filter for generating a frequency error signal corresponding to an estimate of the frequency error associated with two consecutively received outer symbols.
Claim 26
Dependent Claim
91 words
A carrier recovery circuit, comprising: a signal de-rotator; a phase detector coupled to the signal de-rotator; a slicer module coupled to the signal de-rotator and the phase detector; a filter coupled to the phase detector and to the signal de-rotator, the filter generating a signal used to control a frequency of an input signal to the de-rotator; and a frequency error detection circuit coupled to the de-rotator and the filter for generating a frequency error signal corresponding to an estimate of the frequency error associated with two consecutively received outer symbols.
Claim 27
Dependent Claim
45 words
The carrier recovery circuit of claim 21, wherein the frequency error detection circuit includes: a consecutive outer symbol detection circuit for detecting the receipt of consecutively received outer symbols; and a frequency error estimation circuit for generating a frequency error signal from consecutively received symbols.
Claim 28
Dependent Claim
38 words
The carrier recovery circuit of claim 22, wherein the frequency error detection circuit further includes: an ambiguity detector circuit for determining when the frequency error signal assumes a value which represents an ambiguous estimate of the frequency error.
Claim 29
Dependent Claim
50 words
The carrier recovery circuit of claim 21, wherein the frequency error detection circuit further includes: control logic coupled to the frequency error detection circuit and the frequency error estimation circuit for controlling when a frequency error signal generated by the frequency error estimation circuit will be supplied to the filter.
Claim 30
Independent Claim
96 words
A method of processing a first signal including a sequence of symbols, the sequence of symbols including both inner and outer symbols, the method comprising the steps of: receiving the sequence of symbols included in the first signal; and analyzing, using an outer symbol detection circuit including an AND gate and a delay element, the received sequence of symbols to identify a set of consecutive outer symbols, the set of consecutive outer symbols including at least two sequentially received outer symbols one of which immediately follows the other outer symbol in the received sequence of symbols.
Claim 31
Independent Claim
96 words
A method of processing a first signal including a sequence of symbols, the sequence of symbols including both inner and outer symbols, the method comprising the steps of: receiving the sequence of symbols included in the first signal; and analyzing, using an outer symbol detection circuit including an AND gate and a delay element, the received sequence of symbols to identify a set of consecutive outer symbols, the set of consecutive outer symbols including at least two sequentially received outer symbols one of which immediately follows the other outer symbol in the received sequence of symbols.
Claim 32
Dependent Claim
40 words
The method of claim 25, further comprising the steps of: generating an estimate of the frequency error associated with an identified set of consecutive outer symbols; and utilizing the estimated frequency error to adjust the frequency of the first signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-08-16 | 2003-02-15 | 2003-08-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-08-16 | 2007-02-15 | 2007-08-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-08-16 | 2011-02-15 | 2011-08-17 | $7700.00 | Window Closed / Lapsed |