Data receiving device which enables simultaneous execution of processes of a plurality of protocol hierarchies and generates header end signals

Claim 2

A data receiving device for receiving from a network frame data based on any arbitrary protocol in a plurality of protocol hierarchies which are defined from a physical layer to upper layers, comprising: an input data control circuit for receiving the frame data from the network together with its synchronizing signal and storing them in a register, a capture register circuit for storing/holding information such as a protocol type code, a header length, a frame length, source/destination addresses or source/destination port numbers or socket numbers included in a header for each protocol hierarchy constituting the frame data; a protocol recognition circuit for identifying a protocol type of each protocol hierarchy from a protocol type code stored in the capture register circuit; a sequence selection circuit for generating a sequence selection signal used to select a process for each protocol hierarchy of the received frame data in accordance with a result of identification by the protocol recognition circuit and for changing over the sequence selection signal in accordance with a header end signal; a sequence counter for counting pulse signals of the frame data synchronizing signal; a sequencer having a function to operate in accordance with a value of the sequence counter and the sequence selection signal, direct to the capture register circuit a timing for storing/holding the information included in the header for each protocol hierarchy; and a header end timing detection circuit which generates the header end signal according to a header end timing obtained by comparing a value of the sequence counter with a header length of the currently-received protocol hierarchy.

Claim 3

A data receiving device for receiving from a network frame data based on any arbitrary protocol in a plurality of protocol hierarchies which are defined from a physical layer to upper layers, comprising: an input data control circuit for receiving the fame data from the network together with its synchronizing signal and storing them in a register; a capture register circuit for storing/holding information such as a protocol type code, a header length, a frame length, source/destination addresses or source/destination port numbers or socket numbers included in a header for each protocol hierarchy constituting the frame data; a sequence selection circuit for generating a sequence selection signal used to select a process for each protocol hierarchy of the received frame data in accordance with a protocol type code stored in the capture register circuit and for changing over the sequence selection signal in accordance with a header end signal; a sequence counter for counting pulse signals of the frame data synchronizing signal; a sequencer having a function to operate in accordance with a value of the sequence counter and the sequence selection signal, direct to the capture register circuit a timing for storing/holding the information included in the header for each protocol hierarchy and output a second header end timing for directing an end timing for the header when a protocol which is directed by the sequence selection signal and is currently processed has a header having a fixed length; and a header end timing detection circuit which selects either the first header end timing obtained by comparing a value of the sequence counter with a header length of the currently-received protocol hierarchy or the second header end timing output by the sequencer to generate the header end signal.

Claim 4

A data receiving device for receiving from a network frame data based on any arbitrary protocol in a plurality of protocol hierarchies which are defined from a physical layer to upper layers, comprising: an input data control circuit for receiving the fame data from the network together with its synchronizing signal and storing them in a register; a capture register circuit for storing/holding information such as a protocol type code, a header length, a frame length, source/destination addresses or source/destination port numbers or socket numbers included in a header for each protocol hierarchy constituting the frame data; a sequence selection circuit for generating a sequence selection signal used to select a process for each protocol hierarchy of the received frame data in accordance with a protocol type code stored in the capture register circuit and for changing over the sequence selection signal in accordance with a header end signal; a sequence counter for counting pulse signals of the frame data synchronizing signal; a sequencer having a function to operate in accordance with a value of the sequence counter and the sequence selection signal, direct to the capture register circuit a timing for storing/holding the information included in the header for each protocol hierarchy and output a second header end timing for directing an end timing for the header when a protocol which is directed by the sequence selection signal and is currently processed has a header having a fixed length; and a header end timing detection circuit which selects either the first header end timing obtained by comparing a value of the sequence counter with a header length of the currently-received protocol hierarchy or the second header end timing output by the sequencer to generate the header end signal.

Claim 5

A data receiving device for receiving from a network frame data based on any arbitrary protocol in a plurality of protocol hierarchies which are defined from a physical layer to upper layers, comprising: an input data control circuit for receiving the frame data from the network together with its synchronizing signal and storing them in a storage means; a capture register circuit for storing/holding information such as a protocol type code, a header length, a frame length, source/destination addresses or source/destination port numbers or socket numbers included in a header for each protocol hierarchy constituting the frame data; a protocol recognition circuit for identifying a protocol type of each protocol hierarchy from a protocol type code stored in the capture register circuit; a sequence selection circuit for generating a sequence selection signal used to select a process for each protocol hierarchy of the received frame data in accordance with a result of identification by the protocol recognition circuit and for changing over the sequence selection signal in accordance with a header end signal; a sequence counter for counting pulse signals of the frame data synchronizing signal; a sequencer having a function to operate in accordance with a value of the sequence counter and the sequence selection signal, direct to the capture register circuit a timing for storing/holding the information included in the header for each protocol hierarchy and output a second header end timing for directing an end timing for the header when a protocol which is directed by the sequence selection signal and is currently processed has a header having a fixed length; and a header end timing detection circuit which selects either the first header end timing obtained by comparing a value of the sequence counter with a header length of the currently-received protocol hierarchy or the second header end timing output by the sequencer to generate the header end signal.

Claim 6

A data receiving device for receiving from a network frame data based on any arbitrary protocol in a plurality of protocol hierarchies which are defined from a physical layer to upper layers, comprising: an input data control circuit for receiving the frame data from the network together with its synchronizing signal and storing them in a storage means; a capture register circuit for storing/holding information such as a protocol type code, a header length, a frame length, source/destination addresses or source/destination port numbers or socket numbers included in a header for each protocol hierarchy constituting the frame data; a protocol recognition circuit for identifying a protocol type of each protocol hierarchy from a protocol type code stored in the capture register circuit; a sequence selection circuit for generating a sequence selection signal used to select a process for each protocol hierarchy of the received frame data in accordance with a result of identification by the protocol recognition circuit and for changing over the sequence selection signal in accordance with a header end signal; a sequence counter for counting pulse signals of the frame data synchronizing signal; a sequencer having a function to operate in accordance with a value of the sequence counter and the sequence selection signal, direct to the capture register circuit a timing for storing/holding the information included in the header for each protocol hierarchy and output a second header end timing for directing an end timing for the header when a protocol which is directed by the sequence selection signal and is currently processed has a header having a fixed length; and a header end timing detection circuit which selects either the first header end timing obtained by comparing a value of the sequence counter with a header length of the currently-received protocol hierarchy or the second header end timing output by the sequencer to generate the header end signal.

Claim 7

A data receiving device for receiving from a network frame data based on any arbitrary protocol in a plurality of protocol hierarchies which are defined from a physical layer to upper layers, comprising: an input data control means for receiving the frame data from the network together with its synchronizing signal and storing them in a storage means; a storing/holding means for storing/holding information included in a header for each protocol hierarchy constituting the frame data; a sequence selection means for generating a sequence selection signal used to select a process for each protocol hierarchy of the received frame data in accordance with a protocol type code stored in the storing/holding means and for changing over the sequence selection signal in accordance with a header end signal; a count means for counting pulse signals of the frame data synchronizing signal; a sequencer having a function to operate in accordance with a value of the count means and the sequence selection signal, direct to the storing/holding means a timing for storing/holding the information included in the header for each protocol hierarchy; and a header end timing detection means which generates the header end signal according to a header end timing obtained by comparing a value of the count means with a header length of the currently-received protocol hierarchy.

Claim 8

A data receiving device for receiving from a network frame data based on any arbitrary protocol in a plurality of protocol hierarchies which are defined from a physical layer to upper layers, comprising: an input data control means for receiving the frame data from the network together with its synchronizing signal and storing them in a storage means; a storing/holding means for storing/holding information included in a header for each protocol hierarchy constituting the frame data; a sequence selection means for generating a sequence selection signal used to select a process for each protocol hierarchy of the received frame data in accordance with a protocol type code stored in the storing/holding means and for changing over the sequence selection signal in accordance with a header end signal; a count means for counting pulse signals of the frame data synchronizing signal; a sequencer having a function to operate in accordance with a value of the count means and the sequence selection signal, direct to the storing/holding means a timing for storing/holding the information included in the header for each protocol hierarchy; and a header end timing detection means which generates the header end signal according to a header end timing obtained by comparing a value of the count means with a header length of the currently-received protocol hierarchy.