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US5930672A
Expired / Lapsed
US
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Manufacture of semiconductor device having reliable and fine connection hole
Assignee: Yamaha Corp
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Filing: 1997-05-15
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Granted: 1999-07-27
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Expires: 2017-05-15
Abstract
Abstract A resist pattern (dummy pattern) is formed on the surface of a substrate which pattern has a shape corresponding to a desired connection hole, and thereafter an insulating film such as SOG is formed covering the resist pattern. The insulating film is etched back until the resist pattern is exposed and thereafter the resist pattern is removed by ashing or dissolving. With the above processes, a connection hole corresponding the resist pattern can be obtained. As a layer for forming the dummy pattern, an SiN or polysilicon layer may be used instead of a resist layer. The substrate may have wiring patterns formed thereon via an insulating film or may not have wiring patterns. A fine connection hole having a high aspect ratio can be formed.
Inventors
- 👤 Hiromitsu Yamamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 06:35
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/082; H10W20/031; H10W20/069; H10W20/0696; H10W20/089
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
92 words
A method of manufacturing a wiring on a substrate, comprising the steps of: a) providing a substrate having a first area where the wiring is to be provided; b) forming a dummy pattern on the first area; c) forming an interlayer insulating layer over the substrate so as to cover the dummy pattern; d) flattening the interlayer insulating layer so as to expose an upper surface of the dummy pattern; and e) removing the dummy pattern from the exposed upper surface so as to provide a hole through the interlayer insulating layer.
Claim 2
Independent Claim
92 words
A method of manufacturing a wiring on a substrate, comprising the steps of: a) providing a substrate having a first area where the wiring is to be provided; b) forming a dummy pattern on the first area; c) forming an interlayer insulating layer over the substrate so as to cover the dummy pattern; d) flattening the interlayer insulating layer so as to expose an upper surface of the dummy pattern; and e) removing the dummy pattern from the exposed upper surface so as to provide a hole through the interlayer insulating layer.
Claim 3
Dependent Claim
23 words
A method according to claim 1, wherein the dummy pattern has a taper shape in which a bottom is narrower than a top.
Claim 4
Dependent Claim
24 words
A method according to claim 1, wherein the dummy pattern comprises a material selected from a group consisting of resist, silicon nitride and polysilicon.
Claim 5
Dependent Claim
27 words
A method according to claim 1, further comprising the step of: f) forming a wiring layer through the hole to contact the first area on the substrate.
Claim 6
Independent Claim
102 words
A method of manufacturing a wiring on a substrate, comprising the steps of: a) providing a substrate having a contact area where the wiring is to be provided; b) forming a resist material on the first area; c) patterning the resist material to provide a dummy pattern; d) forming an interlayer insulating layer over the substrate so as to cover the dummy pattern; e) flattening the interlayer insulating layer so as to expose an upper surface of the dummy pattern; and f) removing the dummy pattern from the exposed upper surface so as to provide a hole through the interlayer insulating layer.
Claim 7
Independent Claim
102 words
A method of manufacturing a wiring on a substrate, comprising the steps of: a) providing a substrate having a contact area where the wiring is to be provided; b) forming a resist material on the first area; c) patterning the resist material to provide a dummy pattern; d) forming an interlayer insulating layer over the substrate so as to cover the dummy pattern; e) flattening the interlayer insulating layer so as to expose an upper surface of the dummy pattern; and f) removing the dummy pattern from the exposed upper surface so as to provide a hole through the interlayer insulating layer.
Claim 8
Dependent Claim
17 words
A method according to claim 5, wherein the resist material has two sublayers made of different resist.
Claim 9
Dependent Claim
27 words
A method according to claim 5, further comprising the step of: g) forming a wiring layer through the hole to contact the first area on the substrate.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-07-26 | 2003-01-25 | 2003-07-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-07-26 | 2007-01-25 | 2007-07-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-07-26 | 2011-01-25 | 2011-07-27 | $7700.00 | Window Closed / Lapsed |